Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21436 )
Change subject: mainboard/intel/saddlebrook: add support for Saddle Brook ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/#/c/21436/9/src/mainboard/intel/saddlebrook/roms... File src/mainboard/intel/saddlebrook/romstage.c:
https://review.coreboot.org/#/c/21436/9/src/mainboard/intel/saddlebrook/roms... PS9, Line 62: memory_params->MemorySpdPtr10 = (UINT32) blk.spd_array[2]; I believe this should have changed to spd_array[1] after blk.add_map was modified after patchset 7. I would asssume 2nd DIMM slot to currently not work.