Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56651 )
Change subject: cpu/x86: Rename X86_AMD_INIT_SIPI to X86_INIT_NEED_1_SIPI ......................................................................
cpu/x86: Rename X86_AMD_INIT_SIPI to X86_INIT_NEED_1_SIPI
This patch renames X86_AMD_INIT_SIPI Kconfig to leverage the same logic (to skip 2nd SIPI and reduce delay between INIT and SIPI while perform AP initialization) even on newer Intel platform.
Change-Id: I7a4e6a8b1edc6e8ba43597259bd8b2de697e4e62 Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/56651 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/cpu/x86/Kconfig M src/cpu/x86/mp_init.c M src/soc/amd/cezanne/Kconfig M src/soc/amd/picasso/Kconfig 4 files changed, 7 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved
diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 44c9cb6..693b802 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -164,15 +164,15 @@ This option informs the MTRR code to use the RdMem and WrMem fields in the fixed MTRR MSRs.
-config X86_AMD_INIT_SIPI +config X86_INIT_NEED_1_SIPI bool default n help This option limits the number of SIPI signals sent during during the common AP setup. Intel documentation specifies an INIT SIPI SIPI - sequence, however this doesn't work on some AMD platforms. These - newer AMD platforms don't need the 10ms wait between INIT and SIPI, - so skip that too to save some time. + sequence, however this doesn't work on some AMD and Intel platforms. + These newer AMD and Intel platforms don't need the 10ms wait between + INIT and SIPI, so skip that too to save some time.
config SOC_SETS_MSRS bool diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index c99732f..9b5c230 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -469,7 +469,7 @@ /* Send INIT IPI to all but self. */ lapic_send_ipi(LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT | LAPIC_DM_INIT, 0);
- if (!CONFIG(X86_AMD_INIT_SIPI)) { + if (!CONFIG(X86_INIT_NEED_1_SIPI)) { printk(BIOS_DEBUG, "Waiting for 10ms after sending INIT.\n"); mdelay(10);
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig index 6c8c3e5..b4e808d 100644 --- a/src/soc/amd/cezanne/Kconfig +++ b/src/soc/amd/cezanne/Kconfig @@ -73,7 +73,7 @@ select SSE2 select UDK_2017_BINDING select X86_AMD_FIXED_MTRRS - select X86_AMD_INIT_SIPI + select X86_INIT_NEED_1_SIPI
config ARCH_ALL_STAGES_X86 default n diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index 92607a3..a52ce9a 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -16,7 +16,7 @@ select ARCH_X86 select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS - select X86_AMD_INIT_SIPI + select X86_INIT_NEED_1_SIPI select ACPI_SOC_NVS select ADD_FSP_BINARIES if USE_AMD_BLOBS select DRIVERS_I2C_DESIGNWARE