[XS] Change in coreboot[main]: mb/topton/adl: Enable TPM2 (Intel fTPM/PTT)

[Felix Singer (Code Review)]

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85611?usp=email )

Change subject: mb/topton/adl: Enable TPM2 (Intel fTPM/PTT)
......................................................................

mb/topton/adl: Enable TPM2 (Intel fTPM/PTT)

Change-Id: If1a52cacf2eeef68efdd98c48d5802712305f354
Signed-off-by: Alicja Michalska 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85611
Tested-by: build bot (Jenkins) 
Reviewed-by: Matt DeVillier 
Reviewed-by: Felix Singer 
---
M src/mainboard/topton/adl/Kconfig
M src/mainboard/topton/adl/devicetree.cb
2 files changed, 5 insertions(+), 0 deletions(-)

Approvals:
  Matt DeVillier: Looks good to me, approved
  build bot (Jenkins): Verified
  Felix Singer: Looks good to me, approved

diff --git a/src/mainboard/topton/adl/Kconfig b/src/mainboard/topton/adl/Kconfig
index 94cd222..df8a513 100644
--- a/src/mainboard/topton/adl/Kconfig
+++ b/src/mainboard/topton/adl/Kconfig
@@ -13,6 +13,8 @@
    select SOC_INTEL_ALDERLAKE_PCH_N
    select INTEL_GMA_HAVE_VBT
    select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+	select HAVE_INTEL_PTT
+	select CRB_TPM

config MAINBOARD_DIR
    default "topton/adl"
diff --git a/src/mainboard/topton/adl/devicetree.cb b/src/mainboard/topton/adl/devicetree.cb
index 5dcca69..2b8ac2b 100644
--- a/src/mainboard/topton/adl/devicetree.cb
+++ b/src/mainboard/topton/adl/devicetree.cb
@@ -118,5 +118,8 @@
    		register "pch_hda_idisp_link_frequency"		= "HDA_LINKFREQ_96MHZ"
    		register "pch_hda_idisp_link_tmode"		= "HDA_TMODE_8T"
    	end
+		chip drivers/crb
+			device mmio 0xfed40000 on end
+		end
    end
 end