Change in coreboot[master]: soc/intel/denverton_ns/uart_debug: include header for uart_platform_base

[Felix Held (Code Review)]

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45295 )

Change subject: soc/intel/denverton_ns/uart_debug: include header for uart_platform_base
......................................................................

soc/intel/denverton_ns/uart_debug: include header for uart_platform_base

Include console/uart.h for the declaration of uart_platform_base instead
of declaring the function in the source file.

Change-Id: Ib72d8884f27e93cec058dbcda404dd6908de1981
Signed-off-by: Felix Held 
---
M src/soc/intel/denverton_ns/uart_debug.c
1 file changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/45295/1

diff --git a/src/soc/intel/denverton_ns/uart_debug.c b/src/soc/intel/denverton_ns/uart_debug.c
index acd1f03..7f804c7 100644
--- a/src/soc/intel/denverton_ns/uart_debug.c
+++ b/src/soc/intel/denverton_ns/uart_debug.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

#include <stdint.h>
+#include <console/uart.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <soc/uart.h>
@@ -8,8 +9,6 @@
 #define MY_PCI_DEV(SEGBUS, DEV, FN) \
    ((((SEGBUS)&0xFFF) << 20) | (((DEV)&0x1F) << 15) | (((FN)&0x07) << 12))

-uintptr_t uart_platform_base(unsigned int idx);
-
 uintptr_t uart_platform_base(unsigned int idx)
 {
    return (uintptr_t)pci_io_read_config32(

[Marshall Dawson (Code Review)]

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45295 )

Change subject: soc/intel/denverton_ns/uart_debug: include header for uart_platform_base
......................................................................

Patch Set 1: Code-Review+2

[Aaron Durbin (Code Review)]

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45295 )

Change subject: soc/intel/denverton_ns/uart_debug: include header for uart_platform_base
......................................................................

Patch Set 1: Code-Review+2

[Furquan Shaikh (Code Review)]

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45295 )

Change subject: soc/intel/denverton_ns/uart_debug: include header for uart_platform_base
......................................................................

Patch Set 1: Code-Review+2

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45295 )

Change subject: soc/intel/denverton_ns/uart_debug: include header for uart_platform_base
......................................................................

soc/intel/denverton_ns/uart_debug: include header for uart_platform_base

Include console/uart.h for the declaration of uart_platform_base instead
of declaring the function in the source file.

Change-Id: Ib72d8884f27e93cec058dbcda404dd6908de1981
Signed-off-by: Felix Held 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45295
Tested-by: build bot (Jenkins) 
Reviewed-by: Marshall Dawson 
Reviewed-by: Aaron Durbin 
Reviewed-by: Furquan Shaikh 
---
M src/soc/intel/denverton_ns/uart_debug.c
1 file changed, 1 insertion(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Aaron Durbin: Looks good to me, approved
  Furquan Shaikh: Looks good to me, approved
  Marshall Dawson: Looks good to me, approved

diff --git a/src/soc/intel/denverton_ns/uart_debug.c b/src/soc/intel/denverton_ns/uart_debug.c
index acd1f03..7f804c7 100644
--- a/src/soc/intel/denverton_ns/uart_debug.c
+++ b/src/soc/intel/denverton_ns/uart_debug.c
@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

#include <stdint.h>
+#include <console/uart.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <soc/uart.h>
@@ -8,8 +9,6 @@
 #define MY_PCI_DEV(SEGBUS, DEV, FN) \
    ((((SEGBUS)&0xFFF) << 20) | (((DEV)&0x1F) << 15) | (((FN)&0x07) << 12))

-uintptr_t uart_platform_base(unsigned int idx);
-
 uintptr_t uart_platform_base(unsigned int idx)
 {
    return (uintptr_t)pci_io_read_config32(

[9elements QA (Code Review)]

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45295 )

Change subject: soc/intel/denverton_ns/uart_debug: include header for uart_platform_base
......................................................................

Patch Set 2:

Automatic boot test returned (PASS/FAIL/TOTAL): 8/1/9
"QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/18945
"QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18944
"QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/18943
"QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18942
"QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/18941
"HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/18949
"HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/18948
"HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/18947
"HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/18946

Please note: This test is under development and might not be accurate at all!