[XS] Change in coreboot[main]: mb/emulation/spike-riscv: Define default DRAM_SIZE to avoid crash whe...

[Joel Bueno (Code Review)]

Joel Bueno has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85800?usp=email )

Change subject: mb/emulation/spike-riscv: Define default DRAM_SIZE to avoid crash when probing memory
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mb/emulation/spike-riscv: Define default DRAM_SIZE to avoid crash when probing memory

For RISC-V emulated targets (using SOC_UCB_RISCV), the top of memory is calculated in
cbmem_top_chipset() by calling probe_ramsize() with a size of CONFIG_DRAM_SIZE_MB.
This causes an access fault when the size is set to zero, which is the case for Spike.

This does not happen on qemu because, for that target, we parse the FDT instead of manually probing memory.

TEST=boot verified on SPIKE-RISCV
Fixes: 2fa8caba507a ("lib/ramdetect: Limit probe size to function argument") on SPIKE-RISCV

Change-Id: I567103bcd956b10fab64c5e63018315924ec0d2b
Signed-off-by: joel.bueno 
---
M src/mainboard/emulation/spike-riscv/Kconfig
1 file changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/85800/1

diff --git a/src/mainboard/emulation/spike-riscv/Kconfig b/src/mainboard/emulation/spike-riscv/Kconfig
index 5160125..7bf7ed0 100644
--- a/src/mainboard/emulation/spike-riscv/Kconfig
+++ b/src/mainboard/emulation/spike-riscv/Kconfig
@@ -25,4 +25,8 @@
    int
    default 1

+config DRAM_SIZE_MB
+	int
+	default 1024
+
 endif #  BOARD_EMULATION_SPIKE_RISCV