Change in coreboot[master]: soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48958 )
Change subject: soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation ......................................................................
soc/intel/bdw,nb/intel/hsw: convert panel delays to ms representation
For easier review of the switch to a new register struct in the follow-up change, the panel delay times get converted from destination register raw format to milliseconds representation in this change.
Formula for conversion of power cycle delay:
gpu_panel_power_cycle_delay_ms = (gpu_panel_power_cycle_delay - 1) * 100
Formula for all others:
gpu_panel_power_X_delay_ms = gpu_panel_power_X_delay / 10
The register names gain a suffix `_ms` and calculation of the destination register raw values gets done in gma code now.
Change-Id: Idf8e076dac2b3048a63a0109263a6e7899f07230 Signed-off-by: Michael Niewöhner foss@mniewoehner.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/48958 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/google/auron/variants/auron_paine/overridetree.cb M src/mainboard/google/auron/variants/auron_yuna/overridetree.cb M src/mainboard/google/auron/variants/buddy/overridetree.cb M src/mainboard/google/auron/variants/gandof/overridetree.cb M src/mainboard/google/auron/variants/lulu/overridetree.cb M src/mainboard/google/auron/variants/samus/overridetree.cb M src/mainboard/google/slippy/variants/falco/overridetree.cb M src/mainboard/google/slippy/variants/leon/overridetree.cb M src/mainboard/google/slippy/variants/peppy/overridetree.cb M src/mainboard/google/slippy/variants/wolf/overridetree.cb M src/mainboard/hp/folio_9480m/devicetree.cb M src/mainboard/lenovo/t440p/devicetree.cb M src/mainboard/purism/librem_bdw/devicetree.cb M src/northbridge/intel/haswell/chip.h M src/northbridge/intel/haswell/gma.c M src/soc/intel/broadwell/chip.h M src/soc/intel/broadwell/gma.c 17 files changed, 88 insertions(+), 87 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/google/auron/variants/auron_paine/overridetree.cb b/src/mainboard/google/auron/variants/auron_paine/overridetree.cb index 8111040..cb7fb62 100644 --- a/src/mainboard/google/auron/variants/auron_paine/overridetree.cb +++ b/src/mainboard/google/auron/variants/auron_paine/overridetree.cb @@ -1,11 +1,11 @@ chip soc/intel/broadwell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "70" # 7ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "40" + register "gpu_panel_power_down_delay_ms" = "15" + register "gpu_panel_power_backlight_on_delay_ms" = "7" + register "gpu_panel_power_backlight_off_delay_ms" = "210"
device domain 0 on chip soc/intel/broadwell/pch diff --git a/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb b/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb index eb33d43..746ec9a 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb +++ b/src/mainboard/google/auron/variants/auron_yuna/overridetree.cb @@ -1,11 +1,11 @@ chip soc/intel/broadwell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "40" + register "gpu_panel_power_down_delay_ms" = "15" + register "gpu_panel_power_backlight_on_delay_ms" = "210" + register "gpu_panel_power_backlight_off_delay_ms" = "210"
device domain 0 on chip soc/intel/broadwell/pch diff --git a/src/mainboard/google/auron/variants/buddy/overridetree.cb b/src/mainboard/google/auron/variants/buddy/overridetree.cb index 60fb08c..5423043 100644 --- a/src/mainboard/google/auron/variants/buddy/overridetree.cb +++ b/src/mainboard/google/auron/variants/buddy/overridetree.cb @@ -1,11 +1,11 @@ chip soc/intel/broadwell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "70" # 7ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "40" + register "gpu_panel_power_down_delay_ms" = "15" + register "gpu_panel_power_backlight_on_delay_ms" = "7" + register "gpu_panel_power_backlight_off_delay_ms" = "210"
register "s0ix_enable" = "0"
diff --git a/src/mainboard/google/auron/variants/gandof/overridetree.cb b/src/mainboard/google/auron/variants/gandof/overridetree.cb index c7e2421..19c0ca0 100644 --- a/src/mainboard/google/auron/variants/gandof/overridetree.cb +++ b/src/mainboard/google/auron/variants/gandof/overridetree.cb @@ -1,11 +1,11 @@ chip soc/intel/broadwell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "500" # 50ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "40" + register "gpu_panel_power_down_delay_ms" = "15" + register "gpu_panel_power_backlight_on_delay_ms" = "50" + register "gpu_panel_power_backlight_off_delay_ms" = "210"
device domain 0 on chip soc/intel/broadwell/pch diff --git a/src/mainboard/google/auron/variants/lulu/overridetree.cb b/src/mainboard/google/auron/variants/lulu/overridetree.cb index 8111040..cb7fb62 100644 --- a/src/mainboard/google/auron/variants/lulu/overridetree.cb +++ b/src/mainboard/google/auron/variants/lulu/overridetree.cb @@ -1,11 +1,11 @@ chip soc/intel/broadwell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "70" # 7ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "40" + register "gpu_panel_power_down_delay_ms" = "15" + register "gpu_panel_power_backlight_on_delay_ms" = "7" + register "gpu_panel_power_backlight_off_delay_ms" = "210"
device domain 0 on chip soc/intel/broadwell/pch diff --git a/src/mainboard/google/auron/variants/samus/overridetree.cb b/src/mainboard/google/auron/variants/samus/overridetree.cb index d8aec0a..989b887 100644 --- a/src/mainboard/google/auron/variants/samus/overridetree.cb +++ b/src/mainboard/google/auron/variants/samus/overridetree.cb @@ -4,11 +4,11 @@ register "gpu_dp_c_hotplug" = "0x06"
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "6" # 500ms - register "gpu_panel_power_up_delay" = "2000" # 200ms - register "gpu_panel_power_down_delay" = "500" # 50ms - register "gpu_panel_power_backlight_on_delay" = "2000" # 200ms - register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms + register "gpu_panel_power_cycle_delay_ms" = "500" + register "gpu_panel_power_up_delay_ms" = "200" + register "gpu_panel_power_down_delay_ms" = "50" + register "gpu_panel_power_backlight_on_delay_ms" = "200" + register "gpu_panel_power_backlight_off_delay_ms" = "200"
register "vr_slow_ramp_rate_set" = "3" register "vr_slow_ramp_rate_enable" = "1" diff --git a/src/mainboard/google/slippy/variants/falco/overridetree.cb b/src/mainboard/google/slippy/variants/falco/overridetree.cb index 7df0ca1..54ae615 100644 --- a/src/mainboard/google/slippy/variants/falco/overridetree.cb +++ b/src/mainboard/google/slippy/variants/falco/overridetree.cb @@ -1,11 +1,11 @@ chip northbridge/intel/haswell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms (T4) - register "gpu_panel_power_up_delay" = "600" # 60ms (T1+T2) - register "gpu_panel_power_down_delay" = "600" # 60ms (T3+T7) - register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms (T5) - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms (T6) + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "60" + register "gpu_panel_power_down_delay_ms" = "60" + register "gpu_panel_power_backlight_on_delay_ms" = "210" + register "gpu_panel_power_backlight_off_delay_ms" = "210"
device domain 0 on
diff --git a/src/mainboard/google/slippy/variants/leon/overridetree.cb b/src/mainboard/google/slippy/variants/leon/overridetree.cb index 6dee38e..9c45f00 100644 --- a/src/mainboard/google/slippy/variants/leon/overridetree.cb +++ b/src/mainboard/google/slippy/variants/leon/overridetree.cb @@ -1,11 +1,11 @@ chip northbridge/intel/haswell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "40" + register "gpu_panel_power_down_delay_ms" = "15" + register "gpu_panel_power_backlight_on_delay_ms" = "210" + register "gpu_panel_power_backlight_off_delay_ms" = "210"
device domain 0 on
diff --git a/src/mainboard/google/slippy/variants/peppy/overridetree.cb b/src/mainboard/google/slippy/variants/peppy/overridetree.cb index 689fee4..47edc62 100644 --- a/src/mainboard/google/slippy/variants/peppy/overridetree.cb +++ b/src/mainboard/google/slippy/variants/peppy/overridetree.cb @@ -1,11 +1,11 @@ chip northbridge/intel/haswell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "5" # 400ms - register "gpu_panel_power_up_delay" = "400" # 40ms - register "gpu_panel_power_down_delay" = "150" # 15ms - register "gpu_panel_power_backlight_on_delay" = "2100" # 210ms - register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms + register "gpu_panel_power_cycle_delay_ms" = "400" + register "gpu_panel_power_up_delay_ms" = "40" + register "gpu_panel_power_down_delay_ms" = "15" + register "gpu_panel_power_backlight_on_delay_ms" = "210" + register "gpu_panel_power_backlight_off_delay_ms" = "210"
device domain 0 on
diff --git a/src/mainboard/google/slippy/variants/wolf/overridetree.cb b/src/mainboard/google/slippy/variants/wolf/overridetree.cb index de61839..43bdf56 100644 --- a/src/mainboard/google/slippy/variants/wolf/overridetree.cb +++ b/src/mainboard/google/slippy/variants/wolf/overridetree.cb @@ -1,11 +1,11 @@ chip northbridge/intel/haswell
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "6" # 500ms (T11+T12) - register "gpu_panel_power_up_delay" = "2000" # 200ms (T3) - register "gpu_panel_power_down_delay" = "500" # 50ms (T10) - register "gpu_panel_power_backlight_on_delay" = "10" # 1ms (T8) - register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms (T9) + register "gpu_panel_power_cycle_delay_ms" = "500" + register "gpu_panel_power_up_delay_ms" = "200" + register "gpu_panel_power_down_delay_ms" = "50" + register "gpu_panel_power_backlight_on_delay_ms" = "1" + register "gpu_panel_power_backlight_off_delay_ms" = "200"
device domain 0 on
diff --git a/src/mainboard/hp/folio_9480m/devicetree.cb b/src/mainboard/hp/folio_9480m/devicetree.cb index 140aa84..9baec90 100644 --- a/src/mainboard/hp/folio_9480m/devicetree.cb +++ b/src/mainboard/hp/folio_9480m/devicetree.cb @@ -4,11 +4,11 @@ register "gfx" = "GMA_STATIC_DISPLAYS(0)" register "gpu_dp_b_hotplug" = "4" register "gpu_dp_c_hotplug" = "4" - register "gpu_panel_power_backlight_off_delay" = "1" - register "gpu_panel_power_backlight_on_delay" = "1" - register "gpu_panel_power_cycle_delay" = "6" - register "gpu_panel_power_down_delay" = "500" - register "gpu_panel_power_up_delay" = "2000" + register "gpu_panel_power_backlight_off_delay_ms" = "1" + register "gpu_panel_power_backlight_on_delay_ms" = "1" + register "gpu_panel_power_cycle_delay_ms" = "500" + register "gpu_panel_power_down_delay_ms" = "50" + register "gpu_panel_power_up_delay_ms" = "200" register "gpu_pch_backlight_pwm_hz" = "200" register "usb_xhci_on_resume" = "true" device cpu_cluster 0 on diff --git a/src/mainboard/lenovo/t440p/devicetree.cb b/src/mainboard/lenovo/t440p/devicetree.cb index 9359bb4..e17807f 100644 --- a/src/mainboard/lenovo/t440p/devicetree.cb +++ b/src/mainboard/lenovo/t440p/devicetree.cb @@ -4,11 +4,11 @@ register "gpu_dp_b_hotplug" = "4" register "gpu_dp_c_hotplug" = "4" register "gpu_dp_d_hotplug" = "4" - register "gpu_panel_power_backlight_off_delay" = "1" - register "gpu_panel_power_backlight_on_delay" = "1" - register "gpu_panel_power_cycle_delay" = "6" - register "gpu_panel_power_down_delay" = "500" - register "gpu_panel_power_up_delay" = "2000" + register "gpu_panel_power_backlight_off_delay_ms" = "1" + register "gpu_panel_power_backlight_on_delay_ms" = "1" + register "gpu_panel_power_cycle_delay_ms" = "500" + register "gpu_panel_power_down_delay_ms" = "50" + register "gpu_panel_power_up_delay_ms" = "200" register "gpu_pch_backlight_pwm_hz" = "220" register "ec_present" = "true" device cpu_cluster 0x0 on diff --git a/src/mainboard/purism/librem_bdw/devicetree.cb b/src/mainboard/purism/librem_bdw/devicetree.cb index 0d0fc72..41943e7 100644 --- a/src/mainboard/purism/librem_bdw/devicetree.cb +++ b/src/mainboard/purism/librem_bdw/devicetree.cb @@ -10,11 +10,11 @@ register "gpu_pch_backlight_pwm_hz" = "200"
# Set panel power delays - register "gpu_panel_power_cycle_delay" = "6" # 500ms - register "gpu_panel_power_up_delay" = "2000" # 200ms - register "gpu_panel_power_down_delay" = "500" # 50ms - register "gpu_panel_power_backlight_on_delay" = "2000" # 200ms - register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms + register "gpu_panel_power_cycle_delay_ms" = "500" + register "gpu_panel_power_up_delay_ms" = "200" + register "gpu_panel_power_down_delay_ms" = "50" + register "gpu_panel_power_backlight_on_delay_ms" = "200" + register "gpu_panel_power_backlight_off_delay_ms" = "200"
device cpu_cluster 0 on device lapic 0 on end diff --git a/src/northbridge/intel/haswell/chip.h b/src/northbridge/intel/haswell/chip.h index 73375d7..b1c8d37 100644 --- a/src/northbridge/intel/haswell/chip.h +++ b/src/northbridge/intel/haswell/chip.h @@ -17,11 +17,11 @@ u8 gpu_dp_c_hotplug; /* Digital Port C Hotplug Config */ u8 gpu_dp_d_hotplug; /* Digital Port D Hotplug Config */
- u8 gpu_panel_power_cycle_delay; /* T4 time sequence */ - u16 gpu_panel_power_up_delay; /* T1+T2 time sequence */ - u16 gpu_panel_power_down_delay; /* T3 time sequence */ - u16 gpu_panel_power_backlight_on_delay; /* T5 time sequence */ - u16 gpu_panel_power_backlight_off_delay; /* Tx time sequence */ + u16 gpu_panel_power_cycle_delay_ms; /* T4 time sequence */ + u16 gpu_panel_power_up_delay_ms; /* T1+T2 time sequence */ + u16 gpu_panel_power_down_delay_ms; /* T3 time sequence */ + u16 gpu_panel_power_backlight_on_delay_ms; /* T5 time sequence */ + u16 gpu_panel_power_backlight_off_delay_ms; /* Tx time sequence */
unsigned int gpu_pch_backlight_pwm_hz; enum { diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 71d5ab6..7adcfda 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -257,24 +257,24 @@ /* Setup Panel Power On Delays */ reg32 = gtt_read(PCH_PP_ON_DELAYS); if (!reg32) { - reg32 |= (conf->gpu_panel_power_up_delay & 0x1fff) << 16; - reg32 |= (conf->gpu_panel_power_backlight_on_delay & 0x1fff); + reg32 |= ((conf->gpu_panel_power_up_delay_ms * 10) & 0x1fff) << 16; + reg32 |= (conf->gpu_panel_power_backlight_on_delay_ms * 10) & 0x1fff; gtt_write(PCH_PP_ON_DELAYS, reg32); }
/* Setup Panel Power Off Delays */ reg32 = gtt_read(PCH_PP_OFF_DELAYS); if (!reg32) { - reg32 = (conf->gpu_panel_power_down_delay & 0x1fff) << 16; - reg32 |= (conf->gpu_panel_power_backlight_off_delay & 0x1fff); + reg32 = ((conf->gpu_panel_power_down_delay_ms * 10) & 0x1fff) << 16; + reg32 |= (conf->gpu_panel_power_backlight_off_delay_ms * 10) & 0x1fff; gtt_write(PCH_PP_OFF_DELAYS, reg32); }
/* Setup Panel Power Cycle Delay */ - if (conf->gpu_panel_power_cycle_delay) { + if (conf->gpu_panel_power_cycle_delay_ms) { reg32 = gtt_read(PCH_PP_DIVISOR); reg32 &= ~0x1f; - reg32 |= conf->gpu_panel_power_cycle_delay & 0x1f; + reg32 |= (DIV_ROUND_UP(conf->gpu_panel_power_cycle_delay_ms, 100) + 1) & 0x1f; gtt_write(PCH_PP_DIVISOR, reg32); }
diff --git a/src/soc/intel/broadwell/chip.h b/src/soc/intel/broadwell/chip.h index 81c9780..b77cb71 100644 --- a/src/soc/intel/broadwell/chip.h +++ b/src/soc/intel/broadwell/chip.h @@ -19,11 +19,11 @@ u8 gpu_dp_d_hotplug;
/* Panel power sequence timings */ - u8 gpu_panel_power_cycle_delay; - u16 gpu_panel_power_up_delay; - u16 gpu_panel_power_down_delay; - u16 gpu_panel_power_backlight_on_delay; - u16 gpu_panel_power_backlight_off_delay; + u16 gpu_panel_power_cycle_delay_ms; + u16 gpu_panel_power_up_delay_ms; + u16 gpu_panel_power_down_delay_ms; + u16 gpu_panel_power_backlight_on_delay_ms; + u16 gpu_panel_power_backlight_off_delay_ms;
/* Panel backlight settings */ unsigned int gpu_pch_backlight_pwm_hz; diff --git a/src/soc/intel/broadwell/gma.c b/src/soc/intel/broadwell/gma.c index c033b49..9866ed3 100644 --- a/src/soc/intel/broadwell/gma.c +++ b/src/soc/intel/broadwell/gma.c @@ -4,6 +4,7 @@ #include <device/mmio.h> #include <device/pci_ops.h> #include <bootmode.h> +#include <commonlib/helpers.h> #include <console/console.h> #include <delay.h> #include <device/device.h> @@ -298,24 +299,24 @@ /* Setup Panel Power On Delays */ reg32 = gtt_read(PCH_PP_ON_DELAYS); if (!reg32) { - reg32 |= (conf->gpu_panel_power_up_delay & 0x1fff) << 16; - reg32 |= (conf->gpu_panel_power_backlight_on_delay & 0x1fff); + reg32 |= ((conf->gpu_panel_power_up_delay_ms * 10) & 0x1fff) << 16; + reg32 |= (conf->gpu_panel_power_backlight_on_delay_ms * 10) & 0x1fff; gtt_write(PCH_PP_ON_DELAYS, reg32); }
/* Setup Panel Power Off Delays */ reg32 = gtt_read(PCH_PP_OFF_DELAYS); if (!reg32) { - reg32 = (conf->gpu_panel_power_down_delay & 0x1fff) << 16; - reg32 |= (conf->gpu_panel_power_backlight_off_delay & 0x1fff); + reg32 = ((conf->gpu_panel_power_down_delay_ms * 10) & 0x1fff) << 16; + reg32 |= (conf->gpu_panel_power_backlight_off_delay_ms * 10) & 0x1fff; gtt_write(PCH_PP_OFF_DELAYS, reg32); }
/* Setup Panel Power Cycle Delay */ - if (conf->gpu_panel_power_cycle_delay) { + if (conf->gpu_panel_power_cycle_delay_ms) { reg32 = gtt_read(PCH_PP_DIVISOR); reg32 &= ~0x1f; - reg32 |= conf->gpu_panel_power_cycle_delay & 0x1f; + reg32 |= (DIV_ROUND_UP(conf->gpu_panel_power_cycle_delay_ms, 100) + 1) & 0x1f; gtt_write(PCH_PP_DIVISOR, reg32); }
-
Michael Niewöhner (Code Review)