Change in coreboot[master]: soc/intel/skylake: Remove setting flex_ratio to TDP nominal

[Barnali Sarkar (Code Review)]

Barnali Sarkar has uploaded this change for review. ( https://review.coreboot.org/20050

Change subject: soc/intel/skylake: Remove setting flex_ratio to TDP nominal
......................................................................

soc/intel/skylake: Remove setting flex_ratio to TDP nominal

Factory configured (default) Max Non-TURBO ratio(P1) is already cofigured
in MSR_PLATFORM_INFO(0xCE).
If this Maximum Non-TURBO Ratio(P1) needs to be modified, it should be done
using MSR_FLEX_RATIO (0x194).
Here, in this code, the FLEX_RATIO is being modified by the TDP Nominal
Ratio, reading the MSR_CONFIG_TDP_NOMINAL(0x648). But this value is
actually less than the factory configured Maximum Non TURBO Ratio (P1).
So, this code is actually not required.

Also, the Bit 12 in PCH Soft Strap Register is already set in descriptor.
This Bit implies Processor Boot Max Frequency -
0 = Disable Boot Max Frequency
1 = Enable Boot Max Frequency (Default)
This setting determines if the processor will operate at maximum frequency
at power-on and boot.

Thus this patch will avoid one extra platform warm reset now onwards.

BUG=none
BRANCH=none
TEST=Build and boot poppy

Change-Id: I24bfc86ddf0f038d85da938e41e950382fe2a6c3
Signed-off-by: Barnali Sarkar 
---
M src/soc/intel/skylake/bootblock/cpu.c
1 file changed, 0 insertions(+), 59 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/20050/1

diff --git a/src/soc/intel/skylake/bootblock/cpu.c b/src/soc/intel/skylake/bootblock/cpu.c
index 6963b82..78b93ad 100644
--- a/src/soc/intel/skylake/bootblock/cpu.c
+++ b/src/soc/intel/skylake/bootblock/cpu.c
@@ -27,68 +27,9 @@
 #include <soc/pci_devs.h>
 #include <stdint.h>

-/* Soft Reset Data Register Bit 12 = MAX Boot Frequency */
-#define SPI_STRAP_MAX_FREQ	(1<<12)
-/* Soft Reset Data Register Bit 6-11 = Flex Ratio */
-#define FLEX_RATIO_BIT	6
-
-static void set_pch_cpu_strap(u8 flex_ratio)
-{
-	u32 soft_reset_data;
-
-	/* Soft Reset Data Register Bit 12 = MAX Boot Frequency
-	 * Bit 6-11 = Flex Ratio
-	 * Soft Reset Data register located at SPIBAR0 offset 0xF8[0:15].
-	 */
-	soft_reset_data = SPI_STRAP_MAX_FREQ;
-	soft_reset_data |= (flex_ratio << FLEX_RATIO_BIT);
-	fast_spi_set_strap_msg_data(soft_reset_data);
-}
-
-static void set_flex_ratio_to_tdp_nominal(void)
-{
-	msr_t flex_ratio, msr;
-	u8 nominal_ratio;
-
-	/* Check for Flex Ratio support */
-	flex_ratio = rdmsr(MSR_FLEX_RATIO);
-	if (!(flex_ratio.lo & FLEX_RATIO_EN))
-		return;
-
-	/* Check for >0 configurable TDPs */
-	msr = rdmsr(MSR_PLATFORM_INFO);
-	if (((msr.hi >> 1) & 3) == 0)
-		return;
-
-	/* Use nominal TDP ratio for flex ratio */
-	msr = rdmsr(MSR_CONFIG_TDP_NOMINAL);
-	nominal_ratio = msr.lo & 0xff;
-
-	/* See if flex ratio is already set to nominal TDP ratio */
-	if (((flex_ratio.lo >> 8) & 0xff) == nominal_ratio)
-		return;
-
-	/* Set flex ratio to nominal TDP ratio */
-	flex_ratio.lo &= ~0xff00;
-	flex_ratio.lo |= nominal_ratio << 8;
-	flex_ratio.lo |= FLEX_RATIO_LOCK;
-	wrmsr(MSR_FLEX_RATIO, flex_ratio);
-
-	/* Set PCH Soft Reset Data Register with new Flex Ratio */
-	set_pch_cpu_strap(nominal_ratio);
-
-	/* Delay before reset to avoid potential TPM lockout */
-	mdelay(30);
-
-	/* Issue soft reset, will be "CPU only" due to soft reset data */
-	soft_reset();
-}
-
 void bootblock_cpu_init(void)
 {
    fast_spi_cache_bios_region();
-	/* Set flex ratio and reset if needed */
-	set_flex_ratio_to_tdp_nominal();
    intel_update_microcode_from_cbfs();
 }