Attention is currently required from: Ryan Chuang. Hello Ryan Chuang,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/56907
to review the following change.
Change subject: vc/mediatek/mt8195: Optimize DRAM init time by disabling Vcore setting ......................................................................
vc/mediatek/mt8195: Optimize DRAM init time by disabling Vcore setting
Remove the unnecessary Vcore setting for the DVFS feature.
Signed-off-by: Ryan Chuang ryan.chuang@mediatek.corp-partner.google.com Change-Id: If3c28e57a559a7ec04319c1a489138817e44ec4a --- M src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c 1 file changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/56907/1
diff --git a/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c b/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c index f39023b..501f9d3 100644 --- a/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c +++ b/src/vendorcode/mediatek/mt8195/dramc/dramc_pi_main.c @@ -229,8 +229,9 @@ } #endif
- if (vcore) - dramc_set_vcore_voltage(vcore); + if (CONFIG(MEDIATEK_DRAM_DVFS)) + if (vcore) + dramc_set_vcore_voltage(vcore);
#if defined(DRAM_HQA) if (vio18) @@ -1884,7 +1885,7 @@ ett_fix_freq = 1; /* only 1600 & 4266 */ #endif
- if (CONFIG(MEDIATEK_DRAM_DVFS_LIMIT_FREQ_CNT)) + if (!CONFIG(MEDIATEK_DRAM_DVFS)) ett_fix_freq = 0x1; // 4266, 1600
if (ett_fix_freq != 0xff)