Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56901 )
Change subject: trogdor: Fix "TPM interrupt" lb_gpio to be ACTIVE_HIGH ......................................................................
trogdor: Fix "TPM interrupt" lb_gpio to be ACTIVE_HIGH
"Latched" GPIOs like this one are a virtual representation of the pending interrupt flag for the edge-triggered pin and not a direct representation of line state, so they should always be marked ACTIVE_HIGH or depthcharge will incorrectly negate them. This has always been wrong and meant that depthcharge doesn't correctly wait for Cr50 flow control responses on these platforms. Thankfully it doesn't seem like we've seen any practical issues from this, but it's still very wrong.
BRANCH=trogdor BUG=none TEST=Booted CoachZ (no visible difference)
Signed-off-by: Julius Werner jwerner@chromium.org Change-Id: Ie1586b0e10b64df0712e28552411c4d540a7e457 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56901 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Menzel paulepanter@mailbox.org Reviewed-by: Douglas Anderson dianders@chromium.org --- M src/mainboard/google/trogdor/chromeos.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Douglas Anderson: Looks good to me, approved
diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c index 2136da3..c218388 100644 --- a/src/mainboard/google/trogdor/chromeos.c +++ b/src/mainboard/google/trogdor/chromeos.c @@ -31,7 +31,7 @@ "EC in RW"}, {GPIO_AP_EC_INT.addr, ACTIVE_LOW, gpio_get(GPIO_AP_EC_INT), "EC interrupt"}, - {GPIO_H1_AP_INT.addr, ACTIVE_LOW, gpio_get(GPIO_H1_AP_INT), + {GPIO_H1_AP_INT.addr, ACTIVE_HIGH, gpio_get(GPIO_H1_AP_INT), "TPM interrupt"}, {GPIO_SD_CD_L.addr, ACTIVE_LOW, gpio_get(GPIO_SD_CD_L), "SD card detect"},