Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83873?usp=email )
Change subject: arch/riscv: Remove ram probing ......................................................................
arch/riscv: Remove ram probing
Previously RAM probing was neccessary for our QEMU-RISCV target in order to find the available amount of memory. Now we get the memory from the devicetree propagated by QEMU, so there is no reason to keep it anymore.
Signed-off-by: Maximilian Brune maximilian.brune@9elements.com Change-Id: I9b1e0dc78fc2a66d6085fe99a71245ff46f8e63c --- M src/arch/riscv/Makefile.mk M src/arch/riscv/include/arch/exception.h D src/arch/riscv/ramdetect.c M src/arch/riscv/trap_handler.c M src/arch/riscv/trap_util.S M src/mainboard/emulation/qemu-riscv/Kconfig M src/mainboard/emulation/qemu-riscv/cbmem.c 7 files changed, 6 insertions(+), 80 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/83873/1
diff --git a/src/arch/riscv/Makefile.mk b/src/arch/riscv/Makefile.mk index 6754c22..c370e3e 100644 --- a/src/arch/riscv/Makefile.mk +++ b/src/arch/riscv/Makefile.mk @@ -96,7 +96,6 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y)
romstage-$(CONFIG_SEPARATE_ROMSTAGE) += romstage.S -romstage-y += ramdetect.c
# Build the romstage
@@ -120,7 +119,6 @@
ramstage-y = ramstage-y += ramstage.S -ramstage-y += ramdetect.c ramstage-y += tables.c ramstage-y += payload.c ramstage-y += fit_payload.c diff --git a/src/arch/riscv/include/arch/exception.h b/src/arch/riscv/include/arch/exception.h index 2eb575e..976d752 100644 --- a/src/arch/riscv/include/arch/exception.h +++ b/src/arch/riscv/include/arch/exception.h @@ -26,7 +26,7 @@ }
void redirect_trap(void); -void default_trap_handler(struct trapframe *tf); +void trap_handler(struct trapframe *tf); void handle_supervisor_call(struct trapframe *tf);
#endif diff --git a/src/arch/riscv/ramdetect.c b/src/arch/riscv/ramdetect.c deleted file mode 100644 index 048d396..0000000 --- a/src/arch/riscv/ramdetect.c +++ /dev/null @@ -1,61 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <arch/exception.h> -#include <types.h> -#include <console/console.h> -#include <device/mmio.h> -#include <ramdetect.h> -#include <arch/smp/spinlock.h> -#include <vm.h> - -static enum { - ABORT_CHECKER_NOT_TRIGGERED, - ABORT_CHECKER_TRIGGERED, -} abort_state = ABORT_CHECKER_NOT_TRIGGERED; - -extern void (*trap_handler)(struct trapframe *tf); - -static int get_instruction_len(uintptr_t addr) -{ - uint16_t ins = read16p(addr); - - /* - * 16-bit or 32-bit instructions supported - */ - if ((ins & 0x3) != 3) { - return 2; - } else if ((ins & 0x1f) != 0x1f) { - return 4; - } - - die("Not a 16bit or 32bit instruction 0x%x\n", ins); -} - -static void ramcheck_trap_handler(struct trapframe *tf) -{ - abort_state = ABORT_CHECKER_TRIGGERED; - - /* - * skip read instruction. - */ - int insn_size = get_instruction_len(tf->epc); - - write_csr(mepc, read_csr(mepc) + insn_size); -} - -int probe_mb(const uintptr_t dram_start, const uintptr_t size) -{ - uintptr_t addr = dram_start + (size * MiB) - sizeof(uint32_t); - void *ptr = (void *)addr; - - abort_state = ABORT_CHECKER_NOT_TRIGGERED; - trap_handler = ramcheck_trap_handler; - barrier(); - read32(ptr); - trap_handler = default_trap_handler; - barrier(); - printk(BIOS_DEBUG, "%lx is %s DRAM\n", dram_start + size * MiB, - abort_state == ABORT_CHECKER_NOT_TRIGGERED ? "" : "not"); - - return abort_state == ABORT_CHECKER_NOT_TRIGGERED; -} diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index 2f22ce2..6a151a6 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -109,9 +109,7 @@ } }
-void (*trap_handler)(struct trapframe *tf) = default_trap_handler; - -void default_trap_handler(struct trapframe *tf) +void trap_handler(struct trapframe *tf) { if (tf->cause & 0x8000000000000000ULL) { interrupt_handler(tf); diff --git a/src/arch/riscv/trap_util.S b/src/arch/riscv/trap_util.S index d6a93b0..d81f884 100644 --- a/src/arch/riscv/trap_util.S +++ b/src/arch/riscv/trap_util.S @@ -120,8 +120,7 @@
mv a0,sp # put trapframe as first argument
- LOAD t0, trap_handler - jalr t0 + jal trap_handler
trap_return: restore_regs diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig b/src/mainboard/emulation/qemu-riscv/Kconfig index 27b1b58..9b5a6f0 100644 --- a/src/mainboard/emulation/qemu-riscv/Kconfig +++ b/src/mainboard/emulation/qemu-riscv/Kconfig @@ -69,13 +69,6 @@ int default 0
-config DRAM_SIZE_MB - int - default 16383 - help - Qemu maps MMIO at ALIGN_UP(top_of_mem, 16 * GiB) - To avoid confusing the dram probing algorithm, avoid large dram sizes (16G - 1m) - config OPENSBI_PLATFORM string default "generic" diff --git a/src/mainboard/emulation/qemu-riscv/cbmem.c b/src/mainboard/emulation/qemu-riscv/cbmem.c index 3e11415..ff3f5db 100644 --- a/src/mainboard/emulation/qemu-riscv/cbmem.c +++ b/src/mainboard/emulation/qemu-riscv/cbmem.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <assert.h> #include <cbmem.h> #include <symbols.h> #include <ramdetect.h> @@ -11,9 +12,7 @@ uint64_t top;
top = fdt_get_memory_top((void *)HLS()->fdt); - if (top) - return MIN(top, (uint64_t)4 * GiB - 1); + ASSERT_MSG(top, "Failed reading memory range from FDT");
- size_t dram_mb_detected = probe_ramsize((uintptr_t)_dram, CONFIG_DRAM_SIZE_MB); - return (uintptr_t)_dram + dram_mb_detected * MiB; + return MIN(top, (uint64_t)4 * GiB - 1); }
-
Maximilian Brune (Code Review)