Tim Chu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
soc/intel/common/block/pmc: Select PMC on mainboard basis
Currently the common soc code automatically selects POWER_STATE_DEFAULT_ON_AFTER_FAILURE which makes other options can not be selected in mainboard.
However, there're some cases that power state should change to different states after power reapplying.
Make POWER_STATE_DEFAULT_ON_AFTER_FAILURE default y but do not select it in soc code so that we can disable it and select other options in the mainboard code.
Tested on OCP Delta Lake.
Signed-off-by: Tim Chu Tim.Chu@quantatw.com Change-Id: Ifa853d81ee9477d2440ceaa67b2bd6b863ee52c2 --- M src/soc/intel/common/block/pmc/Kconfig 1 file changed, 3 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/43338/1
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig index c2757e6..63e290f 100644 --- a/src/soc/intel/common/block/pmc/Kconfig +++ b/src/soc/intel/common/block/pmc/Kconfig @@ -4,11 +4,13 @@ bool select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE - select POWER_STATE_DEFAULT_ON_AFTER_FAILURE help Intel Processor common code for Power Management controller(PMC) subsystem
+config POWER_STATE_DEFAULT_ON_AFTER_FAILURE + default y + config PMC_INVALID_READ_AFTER_WRITE bool default n
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
Patch Set 1: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/43338/1/src/soc/intel/common/block/... File src/soc/intel/common/block/pmc/Kconfig:
https://review.coreboot.org/c/coreboot/+/43338/1/src/soc/intel/common/block/... PS1, Line 12: default y depends on HAVE_POWER_STATE_AFTER_FAILURE
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/43338/1/src/soc/intel/common/block/... File src/soc/intel/common/block/pmc/Kconfig:
https://review.coreboot.org/c/coreboot/+/43338/1/src/soc/intel/common/block/... PS1, Line 12: default y
depends on HAVE_POWER_STATE_AFTER_FAILURE
actually depends on SOC_INTEL_COMMON_BLOCK_PMC, doesn't it? I guess the whole remainder of the file could be guarded by
if SOC_INTEL_COMMON_BLOCK_PMC
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/43338/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43338/1//COMMIT_MSG@10 PS1, Line 10: which makes other options can : not be selected in mainboard … making other mainboard options unselectable.
https://review.coreboot.org/c/coreboot/+/43338/1//COMMIT_MSG@14 PS1, Line 14: power reapplying reapplying power
Hello Philipp Deppenwiese, build bot (Jenkins), Nico Huber, Jonathan Zhang, Ryback Hung, Angel Pons, Rocky Phagura, Bryant Ou, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43338
to look at the new patch set (#2).
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
soc/intel/common/block/pmc: Select PMC on mainboard basis
Currently the common soc code automatically selects POWER_STATE_DEFAULT_ON_AFTER_FAILURE which making other mainboard options unselectable.
However, there're some cases that power state should change to different states after reapplying power.
Make POWER_STATE_DEFAULT_ON_AFTER_FAILURE default y but do not select it in soc code so that we can disable it and select other options in the mainboard code.
Tested on OCP Delta Lake.
Signed-off-by: Tim Chu Tim.Chu@quantatw.com Change-Id: Ifa853d81ee9477d2440ceaa67b2bd6b863ee52c2 --- M src/soc/intel/common/block/pmc/Kconfig 1 file changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/43338/2
Hello Philipp Deppenwiese, build bot (Jenkins), Nico Huber, Jonathan Zhang, Ryback Hung, Angel Pons, Rocky Phagura, Bryant Ou, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/43338
to look at the new patch set (#3).
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
soc/intel/common/block/pmc: Select PMC on mainboard basis
Currently the common soc code automatically selects POWER_STATE_DEFAULT_ON_AFTER_FAILURE which making other mainboard options unselectable.
However, there're some cases that power state should change to different states after reapplying power.
Make POWER_STATE_DEFAULT_ON_AFTER_FAILURE default y but do not select it in soc code so that we can disable it and select other options in the mainboard code.
Tested on OCP Delta Lake.
Signed-off-by: Tim Chu Tim.Chu@quantatw.com Change-Id: Ifa853d81ee9477d2440ceaa67b2bd6b863ee52c2 --- M src/soc/intel/common/block/pmc/Kconfig 1 file changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/43338/3
Tim Chu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/c/coreboot/+/43338/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/43338/1//COMMIT_MSG@10 PS1, Line 10: which makes other options can : not be selected in mainboard
… making other mainboard options unselectable.
Done
https://review.coreboot.org/c/coreboot/+/43338/1//COMMIT_MSG@14 PS1, Line 14: power reapplying
reapplying power
Done
Tim Chu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/43338/1/src/soc/intel/common/block/... File src/soc/intel/common/block/pmc/Kconfig:
https://review.coreboot.org/c/coreboot/+/43338/1/src/soc/intel/common/block/... PS1, Line 12: default y
actually depends on SOC_INTEL_COMMON_BLOCK_PMC, doesn't it? I guess the whole remainder of the file […]
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
Patch Set 3: Code-Review+2
Philipp Deppenwiese has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43338 )
Change subject: soc/intel/common/block/pmc: Select PMC on mainboard basis ......................................................................
soc/intel/common/block/pmc: Select PMC on mainboard basis
Currently the common soc code automatically selects POWER_STATE_DEFAULT_ON_AFTER_FAILURE which making other mainboard options unselectable.
However, there're some cases that power state should change to different states after reapplying power.
Make POWER_STATE_DEFAULT_ON_AFTER_FAILURE default y but do not select it in soc code so that we can disable it and select other options in the mainboard code.
Tested on OCP Delta Lake.
Signed-off-by: Tim Chu Tim.Chu@quantatw.com Change-Id: Ifa853d81ee9477d2440ceaa67b2bd6b863ee52c2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43338 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/common/block/pmc/Kconfig 1 file changed, 7 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/common/block/pmc/Kconfig b/src/soc/intel/common/block/pmc/Kconfig index c2757e6..3aa0da8 100644 --- a/src/soc/intel/common/block/pmc/Kconfig +++ b/src/soc/intel/common/block/pmc/Kconfig @@ -4,11 +4,17 @@ bool select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE - select POWER_STATE_DEFAULT_ON_AFTER_FAILURE help Intel Processor common code for Power Management controller(PMC) subsystem
+if SOC_INTEL_COMMON_BLOCK_PMC + +config POWER_STATE_DEFAULT_ON_AFTER_FAILURE + default y + +endif # SOC_INTEL_COMMON_BLOCK_PMC + config PMC_INVALID_READ_AFTER_WRITE bool default n
-
Angel Pons (Code Review) -
Jonathan Zhang (Code Review)
-
Nico Huber (Code Review)
-
Paul Menzel (Code Review)
-
Philipp Deppenwiese (Code Review)
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Tim Chu (Code Review)