[M] Change in coreboot[master]: ACPI: Obsolete FADT p_lvl2_lat and p_lvl3_lat fields

[Kyösti Mälkki (Code Review)]

Attention is currently required from: Lance Zhao, Jason Glenesk, Raul Rangel, Jonathan Zhang, Matt DeVillier, Johnny Lin, Tim Wawrzynczak, Christian Walter, Kyösti Mälkki, Fred Reitberger, Tim Chu.

Hello build bot (Jenkins), Raul Rangel, Jonathan Zhang, Matt DeVillier, Arthur Heymans, Lance Zhao, Jason Glenesk, Johnny Lin, Tim Wawrzynczak, Christian Walter, Fred Reitberger, Felix Held, Tim Chu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/74430

to look at the new patch set (#2).

Change subject: ACPI: Obsolete FADT p_lvl2_lat and p_lvl3_lat fields
......................................................................

ACPI: Obsolete FADT p_lvl2_lat and p_lvl3_lat fields

After the obsoletion of Processor() it is necessary to provide
_CST package to define P_LVLx IO addresses for C2/C3 transitions.
The latency values from _CST will always replace those in FADT.

Change-Id: I3230be719659fe9cdf9ed6ae73bc91b05093ab97
Signed-off-by: Kyösti Mälkki 
---
M src/acpi/acpi.c
M src/soc/amd/cezanne/acpi.c
M src/soc/amd/glinda/acpi.c
M src/soc/amd/mendocino/acpi.c
M src/soc/amd/phoenix/acpi.c
M src/soc/amd/picasso/acpi.c
M src/soc/amd/stoneyridge/acpi.c
M src/soc/intel/xeon_sp/spr/soc_acpi.c
M src/southbridge/amd/pi/hudson/fadt.c
M src/southbridge/intel/bd82x6x/fadt.c
M src/southbridge/intel/i82371eb/fadt.c
M src/southbridge/intel/ibexpeak/fadt.c
M src/southbridge/intel/lynxpoint/fadt.c
13 files changed, 18 insertions(+), 39 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/74430/2