[XS] Change in coreboot[main]: mb/google/cherry: Complete PCIe reset in romstage

[Yidi Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Jianjun Wang, Yu-Ping Wu.

Hello Hung-Te Lin, Jianjun Wang, Yu-Ping Wu, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84118?usp=email

to look at the new patch set (#6).

The following approvals got outdated and were removed:
Code-Review+2 by Yu-Ping Wu, Verified+1 by build bot (Jenkins)

The change is no longer submittable: Code-Review and Verified are unsatisfied now.

Change subject: mb/google/cherry: Complete PCIe reset in romstage
......................................................................

mb/google/cherry: Complete PCIe reset in romstage

De-assert PERST# at romstage to reduce the waiting time in ramstage.

Before
```
[INFO ]  wait_perst_done: PCIe early PERST# de-assertion is not done, de-assert PERST# now
[INFO ]  mtk_pcie_domain_enable: PCIe link up success (47 tries)
```
After
```
[INFO ]  wait_perst_done: PCIe early PERST# de-assertion is not done, de-assert PERST# now
[DEBUG]  wait_perst_asserted: 457568 us elapsed since assert PERST#
[DEBUG]  wait_perst_done: 163413 us elapsed since de-assert PERST#
[INFO ]  mtk_pcie_domain_enable: PCIe link up success (1 tries)
```

BUG=none
TEST=boot from NVMe

Change-Id: I3a73bd574ae8f9f4e624846ce8b901a7d2209e78
Signed-off-by: Yidi Lin 
---
M src/mainboard/google/cherry/romstage.c
M src/soc/mediatek/mt8195/Makefile.mk
2 files changed, 4 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/84118/6