Change in coreboot[master]: [WIP] soc/amd: Add common SMM relocator

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41953 )

Change subject: [WIP] soc/amd: Add common SMM relocator
......................................................................

[WIP] soc/amd: Add common SMM relocator

Change-Id: I0573bbf05b617e392a68c50a09ea5204510919b7
Signed-off-by: Kyösti Mälkki 
---
A src/cpu/amd/smm/mp_smm_init.c
A src/include/cpu/amd/smm_reloc.h
M src/soc/amd/picasso/cpu.c
M src/soc/amd/stoneyridge/cpu.c
4 files changed, 103 insertions(+), 106 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/41953/1

diff --git a/src/cpu/amd/smm/mp_smm_init.c b/src/cpu/amd/smm/mp_smm_init.c
new file mode 100644
index 0000000..ef9380a
--- /dev/null
+++ b/src/cpu/amd/smm/mp_smm_init.c
@@ -0,0 +1,77 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cpu/cpu.h>
+#include <cpu/x86/mp.h>
+#include <cpu/x86/mtrr.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/smm.h>
+#include <cpu/amd/msr.h>
+#include <cpu/amd/amd64_save_state.h>
+#include <cpu/amd/smm_reloc.h>
+#include <cpu/x86/lapic.h>
+#include <device/device.h>
+#include <device/pci_ops.h>
+#include <soc/pci_devs.h>
+#include <soc/cpu.h>
+#include <soc/northbridge.h>
+#include <soc/smi.h>
+#include <soc/iomap.h>
+#include <console/console.h>
+
+/*
+ * MP and SMM loading initialization.
+ */
+
+static struct smm_relocation_params smm_reloc_params;
+
+static void fill_in_relocation_params(struct smm_relocation_params *params)
+{
+	uintptr_t tseg_base;
+	size_t tseg_size;
+
+	smm_region(&tseg_base, &tseg_size);
+
+	params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB);
+	params->tseg_base.hi = 0;
+	params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB);
+	params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1);
+
+	params->tseg_mask.lo |= SMM_TSEG_WB;
+}
+
+static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
+				size_t *smm_save_state_size)
+{
+	printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
+
+	fill_in_relocation_params(&smm_reloc_params);
+
+	smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
+	*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
+}
+
+static void per_cpu_smm_trigger(void)
+{
+	if (!boot_cpu())
+		smm_initiate_relocation();
+}
+
+static void relocation_handler(int cpu, uintptr_t curr_smbase,
+				uintptr_t staggered_smbase)
+{
+	struct smm_relocation_params *relo_params = &smm_reloc_params;
+	amd64_smm_state_save_area_t *smm_state;
+
+	wrmsr(SMM_ADDR_MSR, relo_params->tseg_base);
+	wrmsr(SMM_MASK_MSR, relo_params->tseg_mask);
+
+	smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase);
+	smm_state->smbase = staggered_smbase;
+}
+
+void select_mp_ops_amd64(struct mp_ops *mp_ops)
+{
+	mp_ops->get_smm_info = get_smm_info;
+	mp_ops->per_cpu_smm_trigger = per_cpu_smm_trigger;
+	mp_ops->relocation_handler = relocation_handler;
+}
diff --git a/src/include/cpu/amd/smm_reloc.h b/src/include/cpu/amd/smm_reloc.h
new file mode 100644
index 0000000..174fb79
--- /dev/null
+++ b/src/include/cpu/amd/smm_reloc.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __AMD_SMM_RELOC_H__
+#define __AMD_SMM_RELOC_H__
+
+#include <cpu/x86/msr.h>
+
+struct smm_relocation_params {
+	msr_t tseg_base;
+	msr_t tseg_mask;
+};
+
+struct mp_ops;
+void select_mp_ops_amd64(struct mp_ops *mp_ops);
+
+#endif
diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index 3512c94..b01c8e0 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -6,7 +6,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>
 #include <cpu/amd/msr.h>
-#include <cpu/amd/amd64_save_state.h>
+#include <cpu/amd/smm_reloc.h>
 #include <cpu/x86/lapic.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
@@ -18,16 +18,6 @@
 #include <console/console.h>

/*
- * MP and SMM loading initialization.
- */
-struct smm_relocation_params {
-	msr_t tseg_base;
-	msr_t tseg_mask;
-};
-
-static struct smm_relocation_params smm_reloc_params;
-
-/*
  * Do essential initialization tasks before APs can be fired up -
  *
  *  1. Prevent race condition in MTRR solution. Enable MTRRs on the BSP. This
@@ -45,55 +35,17 @@
    return 1 + (cpuid_ecx(0x80000008) & 0xff);
 }

-static void fill_in_relocation_params(struct smm_relocation_params *params)
-{
-	uintptr_t tseg_base;
-	size_t tseg_size;
-
-	smm_region(&tseg_base, &tseg_size);
-
-	params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB);
-	params->tseg_base.hi = 0;
-	params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB);
-	params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1);
-
-	params->tseg_mask.lo |= SMM_TSEG_WB;
-}
-
-static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
-				size_t *smm_save_state_size)
-{
-	printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
-
-	fill_in_relocation_params(&smm_reloc_params);
-
-	smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
-	*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
-}
-
-static void relocation_handler(int cpu, uintptr_t curr_smbase,
-				uintptr_t staggered_smbase)
-{
-	struct smm_relocation_params *relo_params = &smm_reloc_params;
-	amd64_smm_state_save_area_t *smm_state;
-
-	wrmsr(SMM_ADDR_MSR, relo_params->tseg_base);
-	wrmsr(SMM_MASK_MSR, relo_params->tseg_mask);
-
-	smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase);
-	smm_state->smbase = staggered_smbase;
-}
-
-static const struct mp_ops mp_ops = {
+static struct mp_ops mp_ops = {
    .pre_mp_init = pre_mp_init,
    .get_cpu_count = get_cpu_count,
-	.get_smm_info = get_smm_info,
-	.relocation_handler = relocation_handler,
    .post_mp_init = enable_smi_generation,
 };

void mp_init_cpus(struct bus *cpu_bus)
 {
+	if (CONFIG(HAVE_SMI_HANDLER))
+		select_mp_ops_amd64(&mp_ops);
+
    /* Clear for take-off */
    if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
    	printk(BIOS_ERR, "MP initialization failure.\n");
diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c
index 9189cfb..7cda82f 100644
--- a/src/soc/amd/stoneyridge/cpu.c
+++ b/src/soc/amd/stoneyridge/cpu.c
@@ -6,7 +6,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>
 #include <cpu/amd/msr.h>
-#include <cpu/amd/amd64_save_state.h>
+#include <cpu/amd/smm_reloc.h>
 #include <cpu/x86/lapic.h>
 #include <device/device.h>
 #include <device/pci_ops.h>
@@ -18,16 +18,6 @@
 #include <console/console.h>

/*
- * MP and SMM loading initialization.
- */
-struct smm_relocation_params {
-	msr_t tseg_base;
-	msr_t tseg_mask;
-};
-
-static struct smm_relocation_params smm_reloc_params;
-
-/*
  * Do essential initialization tasks before APs can be fired up -
  *
  *  1. Prevent race condition in MTRR solution. Enable MTRRs on the BSP. This
@@ -46,55 +36,17 @@
    								+ 1;
 }

-static void fill_in_relocation_params(struct smm_relocation_params *params)
-{
-	uintptr_t tseg_base;
-	size_t tseg_size;
-
-	smm_region(&tseg_base, &tseg_size);
-
-	params->tseg_base.lo = ALIGN_DOWN(tseg_base, 128 * KiB);
-	params->tseg_base.hi = 0;
-	params->tseg_mask.lo = ALIGN_DOWN(~(tseg_size - 1), 128 * KiB);
-	params->tseg_mask.hi = ((1 << (cpu_phys_address_size() - 32)) - 1);
-
-	params->tseg_mask.lo |= SMM_TSEG_WB;
-}
-
-static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
-				size_t *smm_save_state_size)
-{
-	printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
-
-	fill_in_relocation_params(&smm_reloc_params);
-
-	smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
-	*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);
-}
-
-static void relocation_handler(int cpu, uintptr_t curr_smbase,
-				uintptr_t staggered_smbase)
-{
-	struct smm_relocation_params *relo_params = &smm_reloc_params;
-	amd64_smm_state_save_area_t *smm_state;
-
-	wrmsr(SMM_ADDR_MSR, relo_params->tseg_base);
-	wrmsr(SMM_MASK_MSR, relo_params->tseg_mask);
-
-	smm_state = (void *)(SMM_AMD64_SAVE_STATE_OFFSET + curr_smbase);
-	smm_state->smbase = staggered_smbase;
-}
-
-static const struct mp_ops mp_ops = {
+static struct mp_ops mp_ops = {
    .pre_mp_init = pre_mp_init,
    .get_cpu_count = get_cpu_count,
-	.get_smm_info = get_smm_info,
-	.relocation_handler = relocation_handler,
    .post_mp_init = enable_smi_generation,
 };

void mp_init_cpus(struct bus *cpu_bus)
 {
+	if (CONFIG(HAVE_SMI_HANDLER))
+		select_mp_ops_amd64(&mp_ops);
+
    /* Clear for take-off */
    if (mp_init_with_smm(cpu_bus, &mp_ops) < 0)
    	printk(BIOS_ERR, "MP initialization failure.\n");

[Kyösti Mälkki (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41953

to look at the new patch set (#2).

Change subject: [WIP] soc/amd: Add common SMM relocator
......................................................................

[WIP] soc/amd: Add common SMM relocator

Change-Id: I0573bbf05b617e392a68c50a09ea5204510919b7
Signed-off-by: Kyösti Mälkki 
---
M src/cpu/amd/smm/Makefile.inc
A src/cpu/amd/smm/mp_smm_init.c
A src/include/cpu/amd/smm_reloc.h
M src/soc/amd/picasso/Makefile.inc
M src/soc/amd/picasso/cpu.c
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/amd/stoneyridge/cpu.c
7 files changed, 102 insertions(+), 106 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/41953/2

Change in coreboot[master]: soc/amd: Add common SMM relocator

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41953 )

Change subject: soc/amd: Add common SMM relocator
......................................................................

Patch Set 3:

This change is ready for review.

Change in coreboot[master]: soc/amd: Add common SMM relocator

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/41953 )

Change subject: soc/amd: Add common SMM relocator
......................................................................

Abandoned