Change in coreboot[master]: soc/amd/cezanne/acpi: Add support for RTC workaround - coreboot-gerrit

16 Dec 2021


      Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Karthik Ramasubramanian, Felix Held.
Mario Limonciello has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60172 )
Change subject: soc/amd/cezanne/acpi: Add support for RTC workaround
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Patch Set 1: Code-Review+1
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1f14d14df5d30d48d244416f2ec8c10ac5c8040e
Gerrit-Change-Number: 60172
Gerrit-PatchSet: 1
Gerrit-Owner: Raul Rangel rrangel@chromium.org
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
Gerrit-Reviewer: Jason Glenesk jason.glenesk@gmail.com
Gerrit-Reviewer: Karthik Ramasubramanian kramasub@google.com
Gerrit-Reviewer: Mario Limonciello mario.limonciello@amd.corp-partner.google.com
Gerrit-Reviewer: Marshall Dawson marshalldawson3rd@gmail.com
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Gerrit-Comment-Date: Thu, 16 Dec 2021 18:07:39 +0000
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