Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45503 )
Change subject: nb/intel/sandybridge: Use 133 MHz ref clock for DDR3-2400 ......................................................................
nb/intel/sandybridge: Use 133 MHz ref clock for DDR3-2400
The 100 MHz reference clock seems to be unstable when using high multipliers. Use the 133 MHz reference clock instead.
Change-Id: I400e4f91776306d54d818fa249d7a845020ac37b Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/raminit_native.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/45503/1
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c index 6b74405..19e0e1d 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.c +++ b/src/northbridge/intel/sandybridge/raminit_native.c @@ -136,7 +136,7 @@ { if (ctrl->tCK <= TCK_1200MHZ) { ctrl->tCK = TCK_1200MHZ; - ctrl->base_freq = 100; + ctrl->base_freq = 133; } else if (ctrl->tCK <= TCK_1100MHZ) { ctrl->tCK = TCK_1100MHZ; ctrl->base_freq = 100;
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45503 )
Change subject: nb/intel/sandybridge: Use 133 MHz ref clock for DDR3-2400 ......................................................................
Patch Set 1:
I can't test this, but people who have managed to get native raminit at DDR3-2400 speeds say it's more stable. CB:39760 also helped w.r.t. stability at high frequencies.
Attention is currently required from: Nico Huber, Angel Pons. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45503 )
Change subject: nb/intel/sandybridge: Use 133 MHz ref clock for DDR3-2400 ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45503 )
Change subject: nb/intel/sandybridge: Use 133 MHz ref clock for DDR3-2400 ......................................................................
nb/intel/sandybridge: Use 133 MHz ref clock for DDR3-2400
The 100 MHz reference clock seems to be unstable when using high multipliers. Use the 133 MHz reference clock instead.
Change-Id: I400e4f91776306d54d818fa249d7a845020ac37b Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45503 Reviewed-by: Patrick Rudolph siro@das-labor.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/sandybridge/raminit_native.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c index 4c1fb8f..698db51 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.c +++ b/src/northbridge/intel/sandybridge/raminit_native.c @@ -218,7 +218,7 @@ { if (ctrl->tCK <= TCK_1200MHZ) { ctrl->tCK = TCK_1200MHZ; - ctrl->base_freq = 100; + ctrl->base_freq = 133; } else if (ctrl->tCK <= TCK_1100MHZ) { ctrl->tCK = TCK_1100MHZ; ctrl->base_freq = 100;
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Angel Pons (Code Review) -
Patrick Georgi (Code Review)
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Patrick Rudolph (Code Review)