Change in coreboot[master]: mb/google/auron, cyan: Remove interrupt from devicetree LPC TPM chip d...
Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/27787
Change subject: mb/google/auron,cyan: Remove interrupt from devicetree LPC TPM chip driver ......................................................................
mb/google/auron,cyan: Remove interrupt from devicetree LPC TPM chip driver
These boards require polling vs interrupts, so remove the IRQ definition to prevent it being added to the SSDT device entry.
Test: Boot Linux on various auron and cyan variants, verify no error for 'TPM interrupt not working' present in kernel boot log.
Change-Id: Ia1139389f075934d41e823ce5190011c90c7cc88 Signed-off-by: Matt DeVillier matt.devillier@gmail.com --- M src/mainboard/google/auron/variants/auron_paine/devicetree.cb M src/mainboard/google/auron/variants/auron_yuna/devicetree.cb M src/mainboard/google/auron/variants/gandof/devicetree.cb M src/mainboard/google/auron/variants/lulu/devicetree.cb M src/mainboard/google/auron/variants/samus/devicetree.cb M src/mainboard/google/cyan/variants/banon/devicetree.cb M src/mainboard/google/cyan/variants/celes/devicetree.cb M src/mainboard/google/cyan/variants/cyan/devicetree.cb M src/mainboard/google/cyan/variants/edgar/devicetree.cb M src/mainboard/google/cyan/variants/kefka/devicetree.cb M src/mainboard/google/cyan/variants/reks/devicetree.cb M src/mainboard/google/cyan/variants/relm/devicetree.cb M src/mainboard/google/cyan/variants/setzer/devicetree.cb M src/mainboard/google/cyan/variants/terra/devicetree.cb M src/mainboard/google/cyan/variants/ultima/devicetree.cb M src/mainboard/google/cyan/variants/wizpig/devicetree.cb 16 files changed, 17 insertions(+), 81 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/27787/1
diff --git a/src/mainboard/google/auron/variants/auron_paine/devicetree.cb b/src/mainboard/google/auron/variants/auron_paine/devicetree.cb index 5872cf2..b31d829 100644 --- a/src/mainboard/google/auron/variants/auron_paine/devicetree.cb +++ b/src/mainboard/google/auron/variants/auron_paine/devicetree.cb @@ -91,11 +91,7 @@ device pci 1e.0 off end # PCI bridge device pci 1f.0 on chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/auron/variants/auron_yuna/devicetree.cb b/src/mainboard/google/auron/variants/auron_yuna/devicetree.cb index 34051a7..3c00ec9 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/devicetree.cb +++ b/src/mainboard/google/auron/variants/auron_yuna/devicetree.cb @@ -91,11 +91,7 @@ device pci 1e.0 off end # PCI bridge device pci 1f.0 on chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/auron/variants/gandof/devicetree.cb b/src/mainboard/google/auron/variants/gandof/devicetree.cb index 06ff8ae..118e646 100644 --- a/src/mainboard/google/auron/variants/gandof/devicetree.cb +++ b/src/mainboard/google/auron/variants/gandof/devicetree.cb @@ -90,12 +90,8 @@ device pci 1d.0 on end # USB2 EHCI device pci 1e.0 off end # PCI bridge device pci 1f.0 on - chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + chip drivers/pc80/tpm + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/auron/variants/lulu/devicetree.cb b/src/mainboard/google/auron/variants/lulu/devicetree.cb index 84fc8c4..622ea34 100644 --- a/src/mainboard/google/auron/variants/lulu/devicetree.cb +++ b/src/mainboard/google/auron/variants/lulu/devicetree.cb @@ -92,11 +92,7 @@ device pci 1e.0 off end # PCI bridge device pci 1f.0 on chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/auron/variants/samus/devicetree.cb b/src/mainboard/google/auron/variants/samus/devicetree.cb index d12762d..a6c2fea 100644 --- a/src/mainboard/google/auron/variants/samus/devicetree.cb +++ b/src/mainboard/google/auron/variants/samus/devicetree.cb @@ -95,11 +95,7 @@ device pci 1e.0 off end # PCI bridge device pci 1f.0 on chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/banon/devicetree.cb b/src/mainboard/google/cyan/variants/banon/devicetree.cb index 8d16d04..60076c2 100644 --- a/src/mainboard/google/cyan/variants/banon/devicetree.cb +++ b/src/mainboard/google/cyan/variants/banon/devicetree.cb @@ -135,11 +135,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/celes/devicetree.cb b/src/mainboard/google/cyan/variants/celes/devicetree.cb index 84edd74..2e708af 100644 --- a/src/mainboard/google/cyan/variants/celes/devicetree.cb +++ b/src/mainboard/google/cyan/variants/celes/devicetree.cb @@ -135,11 +135,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/cyan/devicetree.cb b/src/mainboard/google/cyan/variants/cyan/devicetree.cb index 0454650..dd9b05e 100644 --- a/src/mainboard/google/cyan/variants/cyan/devicetree.cb +++ b/src/mainboard/google/cyan/variants/cyan/devicetree.cb @@ -128,11 +128,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/edgar/devicetree.cb b/src/mainboard/google/cyan/variants/edgar/devicetree.cb index 2033f9e..0ba221e 100644 --- a/src/mainboard/google/cyan/variants/edgar/devicetree.cb +++ b/src/mainboard/google/cyan/variants/edgar/devicetree.cb @@ -129,11 +129,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/kefka/devicetree.cb b/src/mainboard/google/cyan/variants/kefka/devicetree.cb index e6542cb..1ce056f 100644 --- a/src/mainboard/google/cyan/variants/kefka/devicetree.cb +++ b/src/mainboard/google/cyan/variants/kefka/devicetree.cb @@ -142,11 +142,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/reks/devicetree.cb b/src/mainboard/google/cyan/variants/reks/devicetree.cb index 53239b5..302f2da 100644 --- a/src/mainboard/google/cyan/variants/reks/devicetree.cb +++ b/src/mainboard/google/cyan/variants/reks/devicetree.cb @@ -126,11 +126,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/relm/devicetree.cb b/src/mainboard/google/cyan/variants/relm/devicetree.cb index eb48ace..65e662c 100644 --- a/src/mainboard/google/cyan/variants/relm/devicetree.cb +++ b/src/mainboard/google/cyan/variants/relm/devicetree.cb @@ -142,11 +142,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/setzer/devicetree.cb b/src/mainboard/google/cyan/variants/setzer/devicetree.cb index b8480a3..f0b2c6f 100644 --- a/src/mainboard/google/cyan/variants/setzer/devicetree.cb +++ b/src/mainboard/google/cyan/variants/setzer/devicetree.cb @@ -135,11 +135,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/terra/devicetree.cb b/src/mainboard/google/cyan/variants/terra/devicetree.cb index 2feb1a3..d7d0f1f 100644 --- a/src/mainboard/google/cyan/variants/terra/devicetree.cb +++ b/src/mainboard/google/cyan/variants/terra/devicetree.cb @@ -135,11 +135,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/ultima/devicetree.cb b/src/mainboard/google/cyan/variants/ultima/devicetree.cb index 287dd02..d4ed38b 100644 --- a/src/mainboard/google/cyan/variants/ultima/devicetree.cb +++ b/src/mainboard/google/cyan/variants/ultima/devicetree.cb @@ -129,11 +129,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end diff --git a/src/mainboard/google/cyan/variants/wizpig/devicetree.cb b/src/mainboard/google/cyan/variants/wizpig/devicetree.cb index 3fb3053..7be7a0f 100644 --- a/src/mainboard/google/cyan/variants/wizpig/devicetree.cb +++ b/src/mainboard/google/cyan/variants/wizpig/devicetree.cb @@ -136,11 +136,7 @@ device pci 1e.7 off end # 8086 22ac - SPI 3 device pci 1f.0 on # 8086 229c - LPC bridge chip drivers/pc80/tpm - # Rising edge interrupt - register "irq_polarity" = "2" - device pnp 0c31.0 on - irq 0x70 = 10 - end + device pnp 0c31.0 on end end chip ec/google/chromeec device pnp 0c09.0 on end
-
Matt DeVillier (Code Review)