Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69037 )
Change subject: cpu: Include <cpu/cpu.h> instead of <arch/cpu.h> ......................................................................
cpu: Include <cpu/cpu.h> instead of <arch/cpu.h>
Also sort includes.
Change-Id: Ia4a3807e45777e2a596878fe09e3c80b1fd2704d Signed-off-by: Elyes Haouas ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/69037 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com --- M src/cpu/amd/pi/00730F01/update_microcode.c M src/cpu/intel/common/common_init.c M src/cpu/intel/common/fsb.c M src/cpu/intel/common/hyperthreading.c M src/cpu/intel/haswell/acpi.c M src/cpu/intel/haswell/haswell.h M src/cpu/intel/hyperthreading/intel_sibling.c M src/cpu/intel/microcode/microcode.c M src/cpu/intel/model_2065x/acpi.c M src/cpu/intel/model_206ax/acpi.c M src/cpu/intel/model_206ax/bootblock.c M src/cpu/intel/model_206ax/model_206ax.h M src/cpu/intel/slot_1/l2_cache.c M src/cpu/intel/speedstep/acpi.c M src/cpu/intel/speedstep/speedstep.c M src/cpu/intel/turbo/turbo.c M src/cpu/x86/mtrr/xip_cache.c M src/cpu/x86/name/name.c M src/cpu/x86/pae/pgtbl.c M src/cpu/x86/tsc/delay_tsc.c 20 files changed, 58 insertions(+), 41 deletions(-)
Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved
diff --git a/src/cpu/amd/pi/00730F01/update_microcode.c b/src/cpu/amd/pi/00730F01/update_microcode.c index 7c15f9b..694af3f 100644 --- a/src/cpu/amd/pi/00730F01/update_microcode.c +++ b/src/cpu/amd/pi/00730F01/update_microcode.c @@ -1,13 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <stdint.h> -#include <arch/cpu.h> -#include <cpu/amd/microcode.h> +#include <cbfs.h> #include <commonlib/helpers.h> #include <console/console.h> -#include <cpu/x86/msr.h> +#include <cpu/amd/microcode.h> #include <cpu/amd/msr.h> -#include <cbfs.h> +#include <cpu/cpu.h> +#include <cpu/x86/msr.h> +#include <stdint.h>
/* * Values and header structure from: diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index 9da162d..b24f742 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpigen.h> -#include <arch/cpu.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/msr.h> #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c index 92f88cd..c535d5d 100644 --- a/src/cpu/intel/common/fsb.c +++ b/src/cpu/intel/common/fsb.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/cpu.h> #include <commonlib/helpers.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/fsb.h> #include <cpu/intel/speedstep.h> #include <cpu/x86/msr.h> diff --git a/src/cpu/intel/common/hyperthreading.c b/src/cpu/intel/common/hyperthreading.c index f9170b3..85c4477 100644 --- a/src/cpu/intel/common/hyperthreading.c +++ b/src/cpu/intel/common/hyperthreading.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <cpu/cpu.h> #include <cpu/intel/common/common.h> -#include <arch/cpu.h> #include <types.h>
bool intel_ht_supported(void) diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 5e5fa81..1f028c3 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -1,14 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <types.h> -#include <console/console.h> #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> +#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> +#include <cpu/x86/msr.h> #include <device/device.h> +#include <types.h> + #include "haswell.h" #include "chip.h"
diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h index 133a129..5697d0f 100644 --- a/src/cpu/intel/haswell/haswell.h +++ b/src/cpu/intel/haswell/haswell.h @@ -3,7 +3,7 @@ #ifndef _CPU_INTEL_HASWELL_H #define _CPU_INTEL_HASWELL_H
-#include <arch/cpu.h> +#include <cpu/cpu.h> #include <stdint.h>
/* CPU types without stepping */ diff --git a/src/cpu/intel/hyperthreading/intel_sibling.c b/src/cpu/intel/hyperthreading/intel_sibling.c index 9fde031..773d8e2 100644 --- a/src/cpu/intel/hyperthreading/intel_sibling.c +++ b/src/cpu/intel/hyperthreading/intel_sibling.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/cpu.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/hyperthreading.h> #include <device/device.h> #include <option.h> diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index ac9453f..6f6e2f1 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -2,9 +2,9 @@
/* Microcode update for Intel PIII and later CPUs */
-#include <arch/cpu.h> #include <cbfs.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <smp/spinlock.h> diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index 9d11ef0..0409b8a 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -1,14 +1,15 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <types.h> -#include <console/console.h> #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> +#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> +#include <cpu/x86/msr.h> #include <device/device.h> +#include <types.h> + #include "model_2065x.h" #include "chip.h"
diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 08548c5..06913bc 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -1,12 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <console/console.h> #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> +#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> +#include <cpu/x86/msr.h> #include <device/device.h> #include <stdint.h>
diff --git a/src/cpu/intel/model_206ax/bootblock.c b/src/cpu/intel/model_206ax/bootblock.c index 6d2e486..cfbe8aee 100644 --- a/src/cpu/intel/model_206ax/bootblock.c +++ b/src/cpu/intel/model_206ax/bootblock.c @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <stdint.h> #include <arch/bootblock.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> #include <arch/io.h> +#include <cpu/cpu.h> +#include <cpu/x86/msr.h> #include <halt.h> +#include <stdint.h>
#include "model_206ax.h"
diff --git a/src/cpu/intel/model_206ax/model_206ax.h b/src/cpu/intel/model_206ax/model_206ax.h index 04e4639..b145523 100644 --- a/src/cpu/intel/model_206ax/model_206ax.h +++ b/src/cpu/intel/model_206ax/model_206ax.h @@ -3,7 +3,7 @@ #ifndef _CPU_INTEL_MODEL_206AX_H #define _CPU_INTEL_MODEL_206AX_H
-#include <arch/cpu.h> +#include <cpu/cpu.h> #include <stdint.h>
/* SandyBridge CPU stepping */ diff --git a/src/cpu/intel/slot_1/l2_cache.c b/src/cpu/intel/slot_1/l2_cache.c index fa43366..e4f8e95 100644 --- a/src/cpu/intel/slot_1/l2_cache.c +++ b/src/cpu/intel/slot_1/l2_cache.c @@ -23,12 +23,12 @@ * Covington-core Celerons do not have L2 cache. */
-#include <stdint.h> -#include <arch/cpu.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/l2_cache.h> #include <cpu/x86/cache.h> #include <cpu/x86/msr.h> +#include <stdint.h>
/* Latency Tables */ struct latency_entry { diff --git a/src/cpu/intel/speedstep/acpi.c b/src/cpu/intel/speedstep/acpi.c index d997ee8..839fec4 100644 --- a/src/cpu/intel/speedstep/acpi.c +++ b/src/cpu/intel/speedstep/acpi.c @@ -1,13 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <types.h> -#include <console/console.h> #include <acpi/acpi.h> #include <acpi/acpigen.h> -#include <arch/cpu.h> +#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/fsb.h> #include <cpu/intel/speedstep.h> #include <device/device.h> +#include <types.h>
static int determine_total_number_of_cores(void) { diff --git a/src/cpu/intel/speedstep/speedstep.c b/src/cpu/intel/speedstep/speedstep.c index 9235272..b1b300d 100644 --- a/src/cpu/intel/speedstep/speedstep.c +++ b/src/cpu/intel/speedstep/speedstep.c @@ -1,11 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <types.h> -#include <string.h> -#include <arch/cpu.h> -#include <cpu/x86/msr.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/speedstep.h> +#include <cpu/x86/msr.h> +#include <string.h> +#include <types.h>
/** * @brief Gather speedstep limits for current processor diff --git a/src/cpu/intel/turbo/turbo.c b/src/cpu/intel/turbo/turbo.c index 5d84745..0b3b782 100644 --- a/src/cpu/intel/turbo/turbo.c +++ b/src/cpu/intel/turbo/turbo.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <console/console.h> +#include <cpu/cpu.h> #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> -#include <arch/cpu.h>
#if CONFIG(CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED) static inline int get_global_turbo_state(void) diff --git a/src/cpu/x86/mtrr/xip_cache.c b/src/cpu/x86/mtrr/xip_cache.c index 6ed96af..dc3bf24 100644 --- a/src/cpu/x86/mtrr/xip_cache.c +++ b/src/cpu/x86/mtrr/xip_cache.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/cpu.h> -#include <program_loading.h> #include <commonlib/region.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/x86/mtrr.h> +#include <program_loading.h>
/* For now this is a good lowest common denominator for the total CPU cache. TODO: fetch the total amount of cache from CPUID leaf2. */ diff --git a/src/cpu/x86/name/name.c b/src/cpu/x86/name/name.c index bf62aef..1b71e5d 100644 --- a/src/cpu/x86/name/name.c +++ b/src/cpu/x86/name/name.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/cpu.h> +#include <cpu/cpu.h> #include <cpu/x86/name.h> #include <stdint.h> #include <string.h> diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c index dceeb88..e16fa02 100644 --- a/src/cpu/x86/pae/pgtbl.c +++ b/src/cpu/x86/pae/pgtbl.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/cpu.h> #include <cbfs.h> #include <commonlib/helpers.h> #include <console/console.h> +#include <cpu/cpu.h> #include <cpu/x86/cr.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c index 978a6ee..4253b18 100644 --- a/src/cpu/x86/tsc/delay_tsc.c +++ b/src/cpu/x86/tsc/delay_tsc.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <arch/cpu.h> +#include <cpu/cpu.h> #include <cpu/x86/tsc.h> #include <delay.h> #include <stdint.h>
-
Felix Held (Code Review)