Patch set updated for coreboot: a0dee8c samus: Disable self refresh and MRC cache on broadwell

[Marc Jones]

Marc Jones ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8214

-gerrit

commit a0dee8c37b8b7a1b9734400158588c0d3a91dd95
Author: Duncan Laurie 
Date:   Tue Jul 15 13:40:21 2014 -0700

samus: Disable self refresh and MRC cache on broadwell

Workarounds for power and/or lpddr3 issues on broadwell SKU.

BUG=chrome-os-partner:29787,chrome-os-partner:29117
    BRANCH=None
    TEST=build and boot on samus

Original-Change-Id: If99346212c10ad6026250e48bedd916611e2cb8c
    Original-Signed-off-by: Duncan Laurie 
    Original-Reviewed-on: https://chromium-review.googlesource.com/208154
    Original-Reviewed-by: Aaron Durbin 
    (cherry picked from commit c3ee57114315320b542f53645ffb168ad654b756)
    Signed-off-by: Marc Jones

Change-Id: Ie28f3ad65000a627ba64486e0f16493e8101cef3
---
 src/mainboard/google/samus/romstage.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c
index d652859..c0c7200 100644
--- a/src/mainboard/google/samus/romstage.c
+++ b/src/mainboard/google/samus/romstage.c
@@ -22,6 +22,7 @@
 #include <console/console.h>
 #include <string.h>
 #include <ec/google/chromeec/ec.h>
+#include <broadwell/cpu.h>
 #include <broadwell/gpio.h>
 #include <broadwell/pei_data.h>
 #include <broadwell/pei_wrapper.h>
@@ -54,6 +55,15 @@ void mainboard_romstage_entry(struct romstage_params *rp)
    mainboard_fill_spd_data(&pei_data);
    rp->pei_data = &pei_data;

+	/*
+	 * Disable use of PEI saved data to work around memory issues.
+	 */
+	if (cpu_family_model() == BROADWELL_FAMILY_ULT) {
+		pei_data.disable_self_refresh = 1;
+		pei_data.disable_saved_data = 1;
+	}
+
+	/* Initalize memory */
    romstage_common(rp);

/*