Change in coreboot[master]: psp_verstage: add new svc for cezanne - coreboot-gerrit

31 Jan 2022


      Attention is currently required from: Jason Glenesk, Marshall Dawson, Kangheui Won, Rob Barnes, Felix Held.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61368 )
Change subject: psp_verstage: add new svc for cezanne
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Patch Set 1:
(1 comment)
File src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h:
https://review.coreboot.org/c/coreboot/+/61368/comment/6016ec3f_b27e98c1 
PS1, Line 144:     CHROME_BOOK_BOOT_MODE_TYPE_MAX_LIMIT     = 0x4, // used for boundary check
...
Ack
Reading the comment on the other CL, should we remove the values we aren't going to support? i.e., `CHROME_BOOK_BOOT_MODE_UNSIGNED_VERSTAGE`.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I6bcc9e49a2b73d486cfecd7b240bf989cad94630
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