Change in coreboot[master]: soc/intel/common/block/gpio: add code for NMI enabling

[Michael Niewöhner (Code Review)]

Hello  Felix Singer, build bot (Jenkins), Nico Huber, Furquan Shaikh, Paul Menzel, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/48090

to look at the new patch set (#9).

Change subject: soc/intel/common/block/gpio: add code for NMI enabling
......................................................................

soc/intel/common/block/gpio: add code for NMI enabling

Especially server boards, like the Supermicro X11SSM-F, often have a NMI
button and NMI functionality that can be triggered via IPMI. The purpose
of this is to cause the OS to create a system crashdump from a hang
system or for debugging.

Add code for enabling NMI interrupts on GPIOs configured with
PAD_CFG_GPI_NMI. The enabling mechanism is the same as SMI, so the SMI
function was copied and adapted. The `pad_community` struct gained two
variables for the registers.

Also register the NMI for LINT1 in the MADT in accordance to ACPI spec.

Test: Linux detects the NMI correctly in dmesg:
[    0.053734] ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1])

Signed-off-by: Michael Niewöhner 
Change-Id: I4fc1a35c99c6a28b20e08a80b97bb4b8624935c9
---
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/common/block/include/intelblocks/gpio.h
M src/soc/intel/skylake/acpi.c
4 files changed, 42 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/48090/9