Attention is currently required from: Shaunak Saha, Martin Roth, Tim Wawrzynczak, Angel Pons, Subrata Banik, Michael Niewöhner, Patrick Rudolph. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51649 )
Change subject: soc/intel/tgl,mb/google/volteer: Add API for Type-C aux bias pads ......................................................................
Patch Set 23:
(2 comments)
File src/soc/intel/common/block/tcss/tcss.c:
https://review.coreboot.org/c/coreboot/+/51649/comment/7f599821_df2ec6fc PS22, Line 331: tcss_configure_aux_bias_pads
Sure, then `tcss_configure` has to take the parameters too, b/c the field exists in the SoC `chip. […]
Yeah. I was thinking we can also move this into `soc_intel_common_config` (https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/src...). And then tcss common block driver can call `chip_get_common_soc_structure()` to get access to the required info. But, I think it is fine either ways i.e. passing in information into `tcss_configure` or adding it to the common structure.
https://review.coreboot.org/c/coreboot/+/51649/comment/2ac92e08_a397e225 PS22, Line 333: MAX_TYPE_C_PORTS
Do you know something I don't? 😜 […]
Haha, you know much more than me ;).
I said Kconfig because if we determine that some platform supports different number of type-C ports, then we don't have to move this to a .h file in SoC. I find that always very error-prone. There is no clear way to document what all is expected from SoC and what a particular definition really means. Also, if different lines of SoC (e.g. Intel-U v/s Intel-Y for the same SoC) supports different number of type-C ports, then it becomes messy in .h file. We can also create a table for `tcss_info` and use that to capture all TCSS related info if Kconfig doesn't seem right.
Anyways, it is not a problem right now, but I suspect we would have to deal with it at some point.