Furquan Shaikh (furquan@google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15894
-gerrit
commit 21307f9d86f72cf44c64c1500ea55d74ad159948 Author: Furquan Shaikh furquan@google.com Date: Mon Jul 25 16:57:46 2016 -0700
qualcomm/storm: Add required files to enable elog in ramstage
BUG=chrome-os-partner:55639
Change-Id: Ie859ec3ff682e91a4d7d38d3c3cd6badf7385431 Signed-off-by: Furquan Shaikh furquan@google.com --- src/mainboard/google/storm/Makefile.inc | 1 + src/soc/qualcomm/ipq806x/Makefile.inc | 4 ++++ 2 files changed, 5 insertions(+)
diff --git a/src/mainboard/google/storm/Makefile.inc b/src/mainboard/google/storm/Makefile.inc index 491b5b5..b603977 100644 --- a/src/mainboard/google/storm/Makefile.inc +++ b/src/mainboard/google/storm/Makefile.inc @@ -37,6 +37,7 @@ ramstage-y += chromeos.c ramstage-y += mainboard.c ramstage-y += mmu.c ramstage-y += reset.c +ramstage-y += gsbi.c
bootblock-y += memlayout.ld romstage-y += memlayout.ld diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc index ffb8752..42d28e4 100644 --- a/src/soc/qualcomm/ipq806x/Makefile.inc +++ b/src/soc/qualcomm/ipq806x/Makefile.inc @@ -49,6 +49,10 @@ ramstage-y += timer.c ramstage-y += uart.c # Want the UART always ready for the kernels' earlyprintk ramstage-y += usb.c ramstage-y += tz_wrapper.S +ramstage-y += gsbi.c +ramstage-y += i2c.c +ramstage-y += qup.c +ramstage-y += spi.c
ifeq ($(CONFIG_USE_BLOBS),y)