Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80084?usp=email )
Change subject: soc/amd/*/chip: factor out FSP-S call ......................................................................
soc/amd/*/chip: factor out FSP-S call
Move the call into the FSP code to a file in the common AMD FSP code to isolate the FSP-specific parts of the code.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ic8236db7ac80275a65020b7e7a9acce8314c831c Reviewed-on: https://review.coreboot.org/c/coreboot/+/80084 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin Roth martin.roth@amd.corp-partner.google.com Reviewed-by: Matt DeVillier matt.devillier@amd.corp-partner.google.com --- M src/soc/amd/cezanne/chip.c M src/soc/amd/common/block/include/amdblocks/fsp.h M src/soc/amd/common/fsp/Makefile.inc A src/soc/amd/common/fsp/fsp_ramstage.c M src/soc/amd/glinda/chip.c M src/soc/amd/mendocino/chip.c M src/soc/amd/phoenix/chip.c M src/soc/amd/picasso/chip.c 8 files changed, 21 insertions(+), 10 deletions(-)
Approvals: Martin Roth: Looks good to me, approved Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/soc/amd/cezanne/chip.c b/src/soc/amd/cezanne/chip.c index 9fd687b..4723321 100644 --- a/src/soc/amd/cezanne/chip.c +++ b/src/soc/amd/cezanne/chip.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/data_fabric.h> +#include <amdblocks/fsp.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <fsp/api.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/pci_devs.h> @@ -37,7 +37,7 @@ { default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
- fsp_silicon_init(); + amd_fsp_silicon_init();
data_fabric_set_mmio_np();
diff --git a/src/soc/amd/common/block/include/amdblocks/fsp.h b/src/soc/amd/common/block/include/amdblocks/fsp.h index a7b664f..f0b72df 100644 --- a/src/soc/amd/common/block/include/amdblocks/fsp.h +++ b/src/soc/amd/common/block/include/amdblocks/fsp.h @@ -4,5 +4,6 @@ #define AMD_BLOCK_FSP_H
void amd_fsp_early_init(void); +void amd_fsp_silicon_init(void);
#endif /* AMD_BLOCK_FSP_H */ diff --git a/src/soc/amd/common/fsp/Makefile.inc b/src/soc/amd/common/fsp/Makefile.inc index 2517f0c..fb78f52 100644 --- a/src/soc/amd/common/fsp/Makefile.inc +++ b/src/soc/amd/common/fsp/Makefile.inc @@ -6,6 +6,7 @@ romstage-y += fsp_validate.c ramstage-y += fsp_graphics.c ramstage-y += fsp_memmap.c +ramstage-y += fsp_ramstage.c ramstage-y += fsp_report_resources.c ramstage-y += fsp_reset.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fsp-acpi.c diff --git a/src/soc/amd/common/fsp/fsp_ramstage.c b/src/soc/amd/common/fsp/fsp_ramstage.c new file mode 100644 index 0000000..f329e98 --- /dev/null +++ b/src/soc/amd/common/fsp/fsp_ramstage.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/fsp.h> +#include <fsp/api.h> + +void amd_fsp_silicon_init(void) +{ + fsp_silicon_init(); +} diff --git a/src/soc/amd/glinda/chip.c b/src/soc/amd/glinda/chip.c index 47794e6..32d3ce5 100644 --- a/src/soc/amd/glinda/chip.c +++ b/src/soc/amd/glinda/chip.c @@ -3,10 +3,10 @@ /* TODO: Update for Glinda */
#include <amdblocks/data_fabric.h> +#include <amdblocks/fsp.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <fsp/api.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/pci_devs.h> @@ -39,7 +39,7 @@ { default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
- fsp_silicon_init(); + amd_fsp_silicon_init();
data_fabric_set_mmio_np();
diff --git a/src/soc/amd/mendocino/chip.c b/src/soc/amd/mendocino/chip.c index b3cbc74..840d29a 100644 --- a/src/soc/amd/mendocino/chip.c +++ b/src/soc/amd/mendocino/chip.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/data_fabric.h> +#include <amdblocks/fsp.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <fsp/api.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/pci_devs.h> @@ -37,7 +37,7 @@ { default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
- fsp_silicon_init(); + amd_fsp_silicon_init();
data_fabric_set_mmio_np();
diff --git a/src/soc/amd/phoenix/chip.c b/src/soc/amd/phoenix/chip.c index 1bbb1b5..ebc3c7c 100644 --- a/src/soc/amd/phoenix/chip.c +++ b/src/soc/amd/phoenix/chip.c @@ -3,10 +3,10 @@ /* TODO: Update for Phoenix */
#include <amdblocks/data_fabric.h> +#include <amdblocks/fsp.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> -#include <fsp/api.h> #include <soc/acpi.h> #include <soc/cpu.h> #include <soc/pci_devs.h> @@ -39,7 +39,7 @@ { default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
- fsp_silicon_init(); + amd_fsp_silicon_init();
data_fabric_set_mmio_np();
diff --git a/src/soc/amd/picasso/chip.c b/src/soc/amd/picasso/chip.c index 067c4a07..4ddfa56 100644 --- a/src/soc/amd/picasso/chip.c +++ b/src/soc/amd/picasso/chip.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/data_fabric.h> +#include <amdblocks/fsp.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -11,7 +12,6 @@ #include <soc/pci_devs.h> #include <soc/southbridge.h> #include "chip.h" -#include <fsp/api.h>
static const char *soc_acpi_name(const struct device *dev) { @@ -38,7 +38,7 @@ { default_dev_ops_root.write_acpi_tables = agesa_write_acpi_tables;
- fsp_silicon_init(); + amd_fsp_silicon_init();
data_fabric_set_mmio_np(); fch_init(chip_info);