Change in coreboot[master]: soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE`

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/49282 )

Change subject: soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE`
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soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE`

It is only used in one place, and there's two other equivalent macros.

Change-Id: I7c8241e28f688abd2df8180559dd02ee441c7023
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49282
Tested-by: build bot (Jenkins) 
Reviewed-by: Arthur Heymans 
---
M src/soc/intel/denverton_ns/include/soc/iomap.h
M src/soc/intel/denverton_ns/pmc.c
2 files changed, 1 insertion(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved

diff --git a/src/soc/intel/denverton_ns/include/soc/iomap.h b/src/soc/intel/denverton_ns/include/soc/iomap.h
index fb5aafd..c252ca1 100644
--- a/src/soc/intel/denverton_ns/include/soc/iomap.h
+++ b/src/soc/intel/denverton_ns/include/soc/iomap.h
@@ -12,7 +12,6 @@

/* Southbridge internal device IO BARs (Set to match FSP settings) */
 #define DEFAULT_PMBASE 0x1800
-#define DEFAULT_ACPI_BASE DEFAULT_PMBASE
 #define ACPI_BASE_ADDRESS DEFAULT_PMBASE
 #define DEFAULT_TCO_BASE 0x400

diff --git a/src/soc/intel/denverton_ns/pmc.c b/src/soc/intel/denverton_ns/pmc.c
index 8755825..258e6a4 100644
--- a/src/soc/intel/denverton_ns/pmc.c
+++ b/src/soc/intel/denverton_ns/pmc.c
@@ -16,7 +16,7 @@
 /* While we read BAR dynamically in case it changed, let's
  * initialize it with a same value
  */
-static u16 acpi_base = DEFAULT_ACPI_BASE;
+static u16 acpi_base = ACPI_BASE_ADDRESS;
 static u32 pwrm_base = DEFAULT_PWRM_BASE;

static void pch_power_options(struct device *dev) { /* TODO */ }