[M] Change in coreboot[main]: soc/mediatek/mt8196: Add booker driver

[Dehui Sun (Code Review)]

Attention is currently required from: Dehui Sun, Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu.

Dehui Sun has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85362?usp=email )

Change subject: soc/mediatek/mt8196: Add booker driver
......................................................................

Patch Set 2:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/85362/comment/41dae8ab_ca22a243?usp... :
PS1, Line 9: booker == CI-700
           : But MTK booker does not fully comply with the CI-700 spec. The booker
           : only uses CHI protocol, while MTK booker does not support coherence. The
           : booker also uses other protocols such as AXI, which is to translate CHI
           : transactions into EMI's AXI transactions.
           : 
           : Booker = Routing + Coherence + MTE + Debug
           : Currently, mt8196 booker only uses the functions of Routing&MTE&Debug.
           : 
           : If downstream SLC needs CMO commands propagation from the DSU, it can
           : set the disable_cmo_prop = 0 in the por_sbsx_cfg_ctl register. When the
           : bit is programmed, the CI-700 must be idle. It's better to program it
           : before transactions go to CI-700.
> I don't see `Booker` this term in ARM CI-700 TRM. The commit message really confuses me. […]

Yes, I agree with your opinion.
I will revise it later and This can be modified in the next release.
Let me explain: MTK Booker is a customized version of CI-700, and most of it reuses the CI-700 transaction protocol standard. The reason why CI-700 was mentioned earlier is to facilitate understanding by others.

https://review.coreboot.org/c/coreboot/+/85362/comment/c9d5e928_1d5004b0?usp... :
PS1, Line 20: It's better to program it
            : before transactions go to CI-700.
> Can you elaborate what settings are configured in this patch ? What happens if those settings are mi […]

Okay, I'll make the changes later.
The main emphasis here is to set the booker to enable CMO bit as early as possible, before any transactions are issued by CI-700.

File src/soc/mediatek/mt8196/booker.c:

https://review.coreboot.org/c/coreboot/+/85362/comment/14b4268e_d8875572?usp... :
PS1, Line 16: NDE
> NDE (No Data Error)

This can be modified in the next release.
Non-data Error (NDE)

https://review.coreboot.org/c/coreboot/+/85362/comment/b2adbe01_e64ea011?usp... :
PS1, Line 23: 	"ldr	x0, =0x0a450a00\n"
            : 	"ldr	x1, [x0]\n"
            : 	"ldr	x2, =0x8\n"
            : 	"bic	x1, x1, x2\n"
            : 	"str	x1, [x0]\n"
            : 
            : 	"ldr	x0, =0x0ac50a00\n"
            : 	"ldr	x1, [x0]\n"
            : 	"ldr	x2, =0x8\n"
            : 	"bic	x1, x1, x2\n"
            : 	"str	x1, [x0]\n"
            : 
            : 	"ldr	x0, =0x0b450a00\n"
            : 	"ldr	x1, [x0]\n"
            : 	"ldr	x2, =0x8\n"
            : 	"bic	x1, x1, x2\n"
            : 	"str	x1, [x0]\n"
            : 
            : 	"ldr	x0, =0x0bc50a00\n"
            : 	"ldr	x1, [x0]\n"
            : 	"ldr	x2, =0x8\n"
            : 	"bic	x1, x1, x2\n"
            : 	"str	x1, [x0]\n"
> Any reason why it can't use `clrbits32p` ?

This inline assembly involves general flow settings.
If MT8196 coreboot must also use the comon API clrbits32p(), I will clarify this later.