Patch set updated for coreboot: vexpress: add primitive RAM map and gfx init

[Vladimir Serbinenko]

Vladimir Serbinenko ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13749

-gerrit

commit 5fb13227e9b8daf1cd7c0170595adcfe90eae9bc
Author: Vladimir Serbinenko 
Date:   Fri Feb 19 15:21:49 2016 +0100

vexpress: add primitive RAM map and gfx init

Change-Id: I0eff29b74d7df331dcbf2c25799eaae4911e54fc
    Signed-off-by: Vladimir Serbinenko 
---
 src/mainboard/emulation/qemu-armv7/Kconfig     |  2 ++
 src/mainboard/emulation/qemu-armv7/mainboard.c | 48 ++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)

diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig
index bb13e98..78b7f49 100644
--- a/src/mainboard/emulation/qemu-armv7/Kconfig
+++ b/src/mainboard/emulation/qemu-armv7/Kconfig
@@ -27,6 +27,8 @@ config BOARD_SPECIFIC_OPTIONS # dummy
    select DRIVERS_UART_PL011
    select BOOTBLOCK_CONSOLE
    select CONSOLE_SERIAL
+	select MAINBOARD_HAS_NATIVE_VGA_INIT
+	select MAINBOARD_DO_NATIVE_VGA_INIT
    select ARCH_BOOTBLOCK_ARMV7
    select ARCH_ROMSTAGE_ARMV7
    select ARCH_RAMSTAGE_ARMV7
diff --git a/src/mainboard/emulation/qemu-armv7/mainboard.c b/src/mainboard/emulation/qemu-armv7/mainboard.c
new file mode 100644
index 0000000..632f11f
--- /dev/null
+++ b/src/mainboard/emulation/qemu-armv7/mainboard.c
@@ -0,0 +1,48 @@
+#include <console/console.h>
+#include <device/device.h>
+#include <cbmem.h>
+#include <string.h>
+#include <edid.h>
+
+static void init_gfx(void)
+{
+	volatile uint32_t *pl111;
+	struct edid edid;
+	/* width is at most 4096 */
+	/* height is at most 1024 */
+	int width = 800, height = 600;
+	uint32_t framebuffer = 0x4c000000;
+	pl111 = (uint32_t *) 0x10020000;
+	pl111[0] = (width / 4) - 4;
+	pl111[1] = height - 1;
+	/* registers 2, 3 and 5 are ignored by qemu. Set them correctly if
+	   we ever go for real hw.  */
+	/* framebuffer adress offset. Has to be in vram.  */
+	pl111[4] = framebuffer;
+	pl111[7] = 0;
+	pl111[10] = 0xff;
+	pl111[6] = (5 << 1) | 0x801;
+
+	edid.framebuffer_bits_per_pixel = 32;
+	edid.bytes_per_line = width * 4;
+	edid.x_resolution = width;
+	edid.y_resolution = height;
+
+	set_vbe_mode_info_valid(&edid, framebuffer);
+}
+
+static void mainboard_enable(device_t dev)
+{
+	if (!dev) {
+		printk(BIOS_EMERG, "No dev0; die\n");
+		while (1);
+	}
+
+	ram_resource(dev, 0, 0x60000000 >> 10, 32768);
+	cbmem_recovery(0);
+	init_gfx();
+}
+
+struct chip_operations mainboard_ops = {
+	.enable_dev = mainboard_enable,
+};