[L] Change in coreboot[master]: added bare Asrock H370m-ITX support

[Name of user not set (Code Review)]

Name of user not set #1004406 has posted comments on this change by Name of user not set #1004406. ( https://review.coreboot.org/c/coreboot/+/65225?usp=email )

Change subject: added bare Asrock H370m-ITX support
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Patch Set 6:

(7 comments)

File configs/config.asrock_h370m_itx:

PS3:
> Looks like default config?

yes

File src/mainboard/asrock/h370m/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/65225/comment/8359ae1c_5a1f3fd2?usp... :
PS2, Line 27: register "PcieClkSrcClkReq" = "{ \
            : 		[0]		= 0, \
            : 		[1]		= 1, \
            : 		[2]		= 2, \
            : 		[3]		= 3, \
            : 		[4]		= 4, \
            : 		[5]		= 6, \
            : 		[6]		= 5, \
            : 		[7]		= 15, \
            : 		[8]		= 7, \
            : 		[9]		= 9, \
            : 		[10]	= 10, \
            : 		[11]	= 11, \
            : 		[12]	= 12, \
            : 		[13]	= 13, \
            : 		[14]	= 14, \
            : 		[15]	= 8, \
            : 	}"
> Please put these under their specific root ports.

Ack

https://review.coreboot.org/c/coreboot/+/65225/comment/58958464_6d6da4b8?usp... :
PS2, Line 46: 	register "PcieClkSrcUsage[0]" = "0x20" # [01]----00.000:01.0
            : 	register "PcieClkSrcUsage[9]" = "0x24" # +-1c.0-[02]----00.0  Intel Corporation I211 Gigabit Network Connection
            : 	register "PcieClkSrcUsage[14]" = "0x40" # +-1d.0-[03]----00.0  Samsung Electronics Co Ltd NVMe SSD Controller SM981/PM981/PM983
            : 	register "PcieClkSrcUsage[15]" = "0x18" # +-1c.6-[02]----00.0  Intel Corporation Dual Band Wireless-AC 3168NGW [Stone Peak
            : 	register "PcieClkSrcUsage[10]" = "0x70" # -1f.6  Intel Corporation Ethernet Connection (7) I219-V
> Please put these under their specific root ports.

Ack

File src/mainboard/asrock/h370m/dsdt.asl:

https://review.coreboot.org/c/coreboot/+/65225/comment/896ae02f_abdcf762?usp... :
PS2, Line 16: 	// global NVS and variables
> Remove, it doesn't add useful value.

Ack

https://review.coreboot.org/c/coreboot/+/65225/comment/2204d730_35632b69?usp... :
PS2, Line 19: 	Scope (_SB) {
> Device (_SB. […]

Ack

https://review.coreboot.org/c/coreboot/+/65225/comment/7a6328c6_d54d217a?usp... :
PS2, Line 28:
> Remove empty line

Ack

File src/mainboard/asrock/h370m/romstage.c:

https://review.coreboot.org/c/coreboot/+/65225/comment/3a8797e3_9a33bd6f?usp... :
PS1, Line 27: 50
> Should be `60` according to intel doc 573387. Probably doesn't make much […]

Ack