[S] Change in coreboot[master]: soc/intel/broadwell: Hook up PCI domain and CPU cluster ops to device...

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69301 )

Change subject: soc/intel/broadwell: Hook up PCI domain and CPU cluster ops to devicetree
......................................................................

soc/intel/broadwell: Hook up PCI domain and CPU cluster ops to devicetree

Change-Id: I77a333827552741453d8b575f2a8009b3e1bf8f1
Signed-off-by: Arthur Heymans 
---
M src/mainboard/google/auron/devicetree.cb
M src/mainboard/google/jecht/devicetree.cb
M src/mainboard/intel/wtm2/devicetree.cb
M src/mainboard/purism/librem_bdw/devicetree.cb
M src/soc/intel/broadwell/northbridge.c
5 files changed, 20 insertions(+), 13 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/69301/1

diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb
index 3e2f289..440efdf 100644
--- a/src/mainboard/google/auron/devicetree.cb
+++ b/src/mainboard/google/auron/devicetree.cb
@@ -15,6 +15,7 @@
    register "ec_present" = "true"

device cpu_cluster 0 on
+		ops broadwell_cpu_bus_ops
    	chip cpu/intel/haswell
    		register "s0ix_enable" = "1"

@@ -24,6 +25,7 @@
    end

device domain 0 on
+		ops broadwell_pci_domain_ops
    	device pci 00.0 on  end # host bridge
    	device pci 02.0 on  end # vga controller
    	device pci 03.0 on  end # mini-hd audio
diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb
index 2f2fa4a..fe09566 100644
--- a/src/mainboard/google/jecht/devicetree.cb
+++ b/src/mainboard/google/jecht/devicetree.cb
@@ -12,6 +12,7 @@
    register "dq_pins_interleaved" = "true"

device cpu_cluster 0 on
+		ops broadwell_cpu_bus_ops
    	chip cpu/intel/haswell
    		device lapic 0 on end
    		device lapic 0xacac off end
@@ -19,6 +20,7 @@
    end

device domain 0 on
+		ops broadwell_pci_domain_ops
    	device pci 00.0 on end # host bridge
    	device pci 02.0 on end # vga controller
    	device pci 03.0 on end # mini-hd audio
diff --git a/src/mainboard/intel/wtm2/devicetree.cb b/src/mainboard/intel/wtm2/devicetree.cb
index 9090999..0becbbf 100644
--- a/src/mainboard/intel/wtm2/devicetree.cb
+++ b/src/mainboard/intel/wtm2/devicetree.cb
@@ -10,12 +10,14 @@
    register "gpu_dp_b_hotplug" = "0x06"

device cpu_cluster 0 on
+		ops broadwell_cpu_bus_ops
    	chip cpu/intel/haswell
    		device lapic 0 on end
    		device lapic 0xacac off end
    	end
    end
    device domain 0 on
+		ops broadwell_pci_domain_ops
    	device pci 00.0 on  end	# host bridge
    	device pci 02.0 on  end	# vga controller
    	device pci 03.0 on  end	# mini-hd audio
diff --git a/src/mainboard/purism/librem_bdw/devicetree.cb b/src/mainboard/purism/librem_bdw/devicetree.cb
index 60a06f4..ae98c9e 100644
--- a/src/mainboard/purism/librem_bdw/devicetree.cb
+++ b/src/mainboard/purism/librem_bdw/devicetree.cb
@@ -21,12 +21,14 @@
    }"

device cpu_cluster 0 on
+		ops broadwell_cpu_bus_ops
    	chip cpu/intel/haswell
    		device lapic 0 on end
    		device lapic 0xacac off end
    	end
    end
    device domain 0 on
+		ops broadwell_pci_domain_ops
    	device pci 00.0 on  end # host bridge
    	device pci 02.0 on  end # vga controller
    	device pci 03.0 on  end # mini-hd audio
diff --git a/src/soc/intel/broadwell/northbridge.c b/src/soc/intel/broadwell/northbridge.c
index b65a758..bbde3d2 100644
--- a/src/soc/intel/broadwell/northbridge.c
+++ b/src/soc/intel/broadwell/northbridge.c
@@ -419,7 +419,7 @@
    .devices = systemagent_ids
 };

-static struct device_operations pci_domain_ops = {
+struct device_operations broadwell_pci_domain_ops = {
    .read_resources    = &pci_domain_read_resources,
    .set_resources     = &pci_domain_set_resources,
    .scan_bus          = &pci_domain_scan_bus,
@@ -428,22 +428,12 @@
 #endif
 };

-static struct device_operations cpu_bus_ops = {
+struct device_operations broadwell_cpu_bus_ops = {
    .read_resources   = noop_read_resources,
    .set_resources    = noop_set_resources,
    .init             = mp_cpu_bus_init,
 };

-static void broadwell_enable(struct device *dev)
-{
-	/* Set the operations if it is a special bus type */
-	if (dev->path.type == DEVICE_PATH_DOMAIN) {
-		dev->ops = &pci_domain_ops;
-	} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
-		dev->ops = &cpu_bus_ops;
-	}
-}
-
 static void broadwell_init_pre_device(void *chip_info)
 {
    broadwell_run_reference_code();
@@ -451,6 +441,5 @@

struct chip_operations soc_intel_broadwell_ops = {
    CHIP_NAME("Intel Broadwell")
-	.enable_dev = &broadwell_enable,
    .init       = &broadwell_init_pre_device,
 };