[S] Change in coreboot[main]: soc/amd/glinda/cpu: Update smbios parameters

[Naresh Solanki (Code Review)]

Naresh Solanki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85637?usp=email )

Change subject: soc/amd/glinda/cpu: Update smbios parameters
......................................................................

soc/amd/glinda/cpu: Update smbios parameters

Change-Id: If8eaa54c9a0086f4d397a7ddb01009acfd3f1aee
Signed-off-by: Naresh Solanki 
---
M src/soc/amd/glinda/cpu.c
1 file changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/85637/1

diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c
index 3be2ddb..680b095 100644
--- a/src/soc/amd/glinda/cpu.c
+++ b/src/soc/amd/glinda/cpu.c
@@ -18,6 +18,21 @@
    return 100; // 100 MHz
 }

+unsigned int smbios_cache_error_correction_type(u8 level)
+{
+	return SMBIOS_CACHE_ERROR_CORRECTION_MULTI_BIT;
+}
+
+unsigned int smbios_cache_conf_operation_mode(u8 level)
+{
+	return SMBIOS_CACHE_OP_MODE_WRITE_BACK;
+}
+
+unsigned int smbios_cache_sram_type(void)
+{
+	return SMBIOS_CACHE_SRAM_TYPE_PIPELINE_BURST;
+}
+
 static void zen_2_3_init(struct device *dev)
 {
    check_mca();