[M] Change in coreboot[master]: soc/amd/common/block/spi: Mainboard to override SPI Read Mode

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68946 )

Change subject: soc/amd/common/block/spi: Mainboard to override SPI Read Mode
......................................................................

soc/amd/common/block/spi: Mainboard to override SPI Read Mode

On certain mainboards due to hardware design limitations, certain SPI
Read Modes eg. (Dual I/O 1-2-2) cannot be supported. Add ability to
override SPI read modes in boards which do not have hardware
limitations. Currently there is an API to override SPI fast speeds.
Update this API for mainboards to override SPI read mode as well.

BUG=b:225213679
TEST=Build and boot to OS in Skyrim. Observe a boot time improvement of
~25 ms with 100 MHz SPI speeds.
Before:
  11:start of bootblock                                688,046
  14:finished loading romstage                         30,865
  16:FSP-M finished LZMA decompress (ignore for x86)   91,049
Total Time: 1,972,625

After:
  11:start of bootblock                                667,642
  14:finished loading romstage                         29,798
  16:FSP-M finished LZMA decompress (ignore for x86)   87,743
Total Time: 1,943,924

Change-Id: I160b56f6201a798ce59e977ca40301e23ab63805
Signed-off-by: Karthikeyan Ramasubramanian 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68946
Tested-by: build bot (Jenkins) 
Reviewed-by: Jon Murphy 
---
M src/mainboard/google/guybrush/spi_speeds.c
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/skyrim/spi_speeds.c
M src/soc/amd/common/block/include/amdblocks/spi.h
M src/soc/amd/common/block/spi/fch_spi.c
5 files changed, 49 insertions(+), 6 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Jon Murphy: Looks good to me, approved

diff --git a/src/mainboard/google/guybrush/spi_speeds.c b/src/mainboard/google/guybrush/spi_speeds.c
index 857e02d..7e7ff71 100644
--- a/src/mainboard/google/guybrush/spi_speeds.c
+++ b/src/mainboard/google/guybrush/spi_speeds.c
@@ -4,7 +4,7 @@
 #include <boardid.h>
 #include <stdint.h>

-void mainboard_spi_fast_speed_override(uint8_t *fast_speed)
+void mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode)
 {
    uint32_t board_ver = board_id();

diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig
index 9036406..d21bcc8 100644
--- a/src/mainboard/google/skyrim/Kconfig
+++ b/src/mainboard/google/skyrim/Kconfig
@@ -107,7 +107,8 @@

if !EM100	# EM100 defaults in soc/amd/common/blocks/spi/Kconfig
 config EFS_SPI_READ_MODE
-	default 2          # Dual IO (1-1-2)
+	default 2 if BOARD_GOOGLE_SKYRIM          # Dual IO (1-1-2)
+	default 4                                 # Dual IO (1-2-2)

config EFS_SPI_SPEED
    default 0	# 66MHz
diff --git a/src/mainboard/google/skyrim/spi_speeds.c b/src/mainboard/google/skyrim/spi_speeds.c
index 857e02d..90a6b476 100644
--- a/src/mainboard/google/skyrim/spi_speeds.c
+++ b/src/mainboard/google/skyrim/spi_speeds.c
@@ -4,10 +4,18 @@
 #include <boardid.h>
 #include <stdint.h>

-void mainboard_spi_fast_speed_override(uint8_t *fast_speed)
+void mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode)
 {
    uint32_t board_ver = board_id();

if (board_ver >= CONFIG_OVERRIDE_EFS_SPI_SPEED_MIN_BOARD)
    	*fast_speed = CONFIG_OVERRIDE_EFS_SPI_SPEED;
+
+	/*
+	 * Due to a hardware limitation, Dual I/O 1-2-2 Read mode is supported starting
+	 * board version 3. This hardware limitation applies only to Skyrim reference
+	 * design.
+	 */
+	if (CONFIG(BOARD_GOOGLE_SKYRIM) && board_ver >= 3)
+		*read_mode = SPI_READ_MODE_DUAL122;
 }
diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h
index 4be3739..dc7097f 100644
--- a/src/soc/amd/common/block/include/amdblocks/spi.h
+++ b/src/soc/amd/common/block/include/amdblocks/spi.h
@@ -118,7 +118,7 @@
 void spi_write32(uint8_t reg, uint32_t val);

void fch_spi_config_modes(void);
-void mainboard_spi_fast_speed_override(uint8_t *fast_speed);
+void mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode);

/* Ensure you hold the mutex when performing SPI transactions */
 extern struct thread_mutex spi_hw_mutex;
diff --git a/src/soc/amd/common/block/spi/fch_spi.c b/src/soc/amd/common/block/spi/fch_spi.c
index 5ef900c..4a8482e 100644
--- a/src/soc/amd/common/block/spi/fch_spi.c
+++ b/src/soc/amd/common/block/spi/fch_spi.c
@@ -50,7 +50,7 @@
    printk(BIOS_DEBUG, "SPI Read Mode: %s\n", read_mode_str[DECODE_SPI_READ_MODE(val32)]);
 }

-void __weak mainboard_spi_fast_speed_override(uint8_t *fast_speed)
+void __weak mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode)
 {
    /* No overriding SPI speeds. */
 }
@@ -107,7 +107,7 @@
    	read_mode = CONFIG_EFS_SPI_READ_MODE;
    	fast_speed = CONFIG_EFS_SPI_SPEED;
    }
-	mainboard_spi_fast_speed_override(&fast_speed);
+	mainboard_spi_cfg_override(&fast_speed, &read_mode);

if (fast_speed != CONFIG_EFS_SPI_SPEED) {
    	normal_speed = lower_speed(normal_speed, fast_speed);