Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/74277 )
(
11 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/myst: Enable mp2 device ......................................................................
mb/google/myst: Enable mp2 device
The mp2 PCI device is still present when no mp2 firmware is loaded. When this device isn't explicitly enabled in the mainboard's devicetree, the chipset devicetree default of the device being disabled is used. This results in coreboot's resource allocator not allocating resources to the device and since the bridge doesn't have enough MMIO space reserved, the Linux kernel can't assign resources to it. Enable the mp2 device in the mainboard's devicetree so that it gets its resources assigned by coreboot.
BUG=b:277217097 TEST=builds
Change-Id: I21885c51ff08846b456675090946f381843ef5e6 Signed-off-by: Jon Murphy jpmurphy@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/74277 Reviewed-by: Karthik Ramasubramanian kramasub@google.com Reviewed-by: Eric Lai eric_lai@quanta.corp-partner.google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/myst/variants/baseboard/devicetree.cb 1 file changed, 27 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved Eric Lai: Looks good to me, approved
diff --git a/src/mainboard/google/myst/variants/baseboard/devicetree.cb b/src/mainboard/google/myst/variants/baseboard/devicetree.cb index 669d6ec..9fc5bfe 100644 --- a/src/mainboard/google/myst/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/myst/variants/baseboard/devicetree.cb @@ -132,6 +132,7 @@ end end device ref acp on end # Audio Processor (ACP) + device ref mp2 on end # Sensor Fusion Hub (MP2) end device ref gpp_bridge_c on # Internal GPP Bridge 2 to Bus C device ref usb4_xhci_0 on