[M] Change in coreboot[master]: soc/intel/meteoerlake: set power limits dynamically

[Jérémy Compostella (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik, Sumeet R Pawnikar, Eric Lai.

Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74380 )

Change subject: soc/intel/meteoerlake: set power limits dynamically
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Patch Set 4:

(1 comment)

File src/soc/intel/meteorlake/chip.h:

https://review.coreboot.org/c/coreboot/+/74380/comment/a1188a47_78178ea4 
PS4, Line 38: 	{ PCI_DID_INTEL_MTL_P_ID_2, MTL_P_282_CORE, TDP_15W },
To my understanding, this database is board specific. It points to settings which are the result of fine tuning factoring information such as the used Voltage Regulator, the particular SoC (number of E-core / P-core), TDP, the overall board design (chips, cooling, ...) along with Power and Performance measurements and tuning on this board design to meet some particular use-cases.

As a result, this database should not be in `soc/intel/meteorlake` but should be somewhere in `mainboard/`.