New patch to review for coreboot: a1805d0 chrome ec: Fix ASL to use IO() instead of FixedIO()
Aaron Durbin (adurbin@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4910
-gerrit
commit a1805d098d8e36b698cfcb84775cf06561685094 Author: Duncan Laurie dlaurie@chromium.org Date: Thu Oct 24 12:37:48 2013 -0700
chrome ec: Fix ASL to use IO() instead of FixedIO()
FixedIO seems like a nice short version of IO but in reality it is limited to 10-bit ISA addresses and so should not really be used in most situations.
Change all the references to use IO() directly instead.
BUG=chromium:311294 BRANCH=none TEST=emerge-samus chromeos-coreboot-samus and check for iasl warnings using updated iasl compiler revision 20130117. Boot the imge and ensure that EC regions are still exported in /proc/ioports.
Change-Id: I54de65892bed9e43dbba916990cf2b70c370843c Signed-off-by: Duncan Laurie dlaurie@chromium.org Reviewed-on: https://chromium-review.googlesource.com/174810 Reviewed-by: Stefan Reinauer reinauer@chromium.org Signed-off-by: Aaron Durbin adurbin@chromium.org --- src/ec/google/chromeec/acpi/superio.asl | 50 +++++++++++++++++++++------------ 1 file changed, 32 insertions(+), 18 deletions(-)
diff --git a/src/ec/google/chromeec/acpi/superio.asl b/src/ec/google/chromeec/acpi/superio.asl index 39ddd29..5940181 100644 --- a/src/ec/google/chromeec/acpi/superio.asl +++ b/src/ec/google/chromeec/acpi/superio.asl @@ -52,12 +52,14 @@ Device (SIO) {
Name (_CRS, ResourceTemplate () { - FixedIO (EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE) + IO (Decode16, EC_LPC_ADDR_MEMMAP, EC_LPC_ADDR_MEMMAP, + 0x08, EC_MEMMAP_SIZE) })
Name (_PRS, ResourceTemplate () { - FixedIO (EC_LPC_ADDR_MEMMAP, EC_MEMMAP_SIZE) + IO (Decode16, EC_LPC_ADDR_MEMMAP, EC_LPC_ADDR_MEMMAP, + 0x08, EC_MEMMAP_SIZE) }) } #endif @@ -74,21 +76,33 @@ Device (SIO) {
Name (_CRS, ResourceTemplate () { - FixedIO (EC_LPC_ADDR_HOST_DATA, 1) - FixedIO (EC_LPC_ADDR_HOST_CMD, 1) - FixedIO (EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION_SIZE) - FixedIO (EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION_SIZE) + IO (Decode16, + EC_LPC_ADDR_HOST_DATA, EC_LPC_ADDR_HOST_DATA, + 0x01, 0x01) + IO (Decode16, + EC_LPC_ADDR_HOST_CMD, EC_LPC_ADDR_HOST_CMD, + 0x01, 0x01) + IO (Decode16, + EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION0, 0x08, + EC_HOST_CMD_REGION_SIZE) + IO (Decode16, + EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION0, 0x08, + EC_HOST_CMD_REGION_SIZE) })
Name (_PRS, ResourceTemplate () { StartDependentFn (0, 0) { - FixedIO (EC_LPC_ADDR_HOST_DATA, 1) - FixedIO (EC_LPC_ADDR_HOST_CMD, 1) - FixedIO (EC_HOST_CMD_REGION0, - EC_HOST_CMD_REGION_SIZE) - FixedIO (EC_HOST_CMD_REGION1, - EC_HOST_CMD_REGION_SIZE) + IO (Decode16, EC_LPC_ADDR_HOST_DATA, + EC_LPC_ADDR_HOST_DATA, 0x01, 0x01) + IO (Decode16, EC_LPC_ADDR_HOST_CMD, + EC_LPC_ADDR_HOST_CMD, 0x01, 0x01) + IO (Decode16, + EC_HOST_CMD_REGION0, EC_HOST_CMD_REGION0, + 0x08, EC_HOST_CMD_REGION_SIZE) + IO (Decode16, + EC_HOST_CMD_REGION1, EC_HOST_CMD_REGION1, + 0x08, EC_HOST_CMD_REGION_SIZE) } EndDependentFn () }) @@ -107,14 +121,14 @@ Device (SIO) {
Name (_CRS, ResourceTemplate () { - FixedIO (0x03F8, 0x08) + IO (Decode16, 0x03F8, 0x3F8, 0x08, 0x08) IRQNoFlags () {4} })
Name (_PRS, ResourceTemplate () { StartDependentFn (0, 0) { - FixedIO (0x03F8, 0x08) + IO (Decode16, 0x03F8, 0x3F8, 0x08, 0x08) IRQNoFlags () {4} } EndDependentFn () @@ -136,16 +150,16 @@ Device (SIO) {
Name (_CRS, ResourceTemplate() { - FixedIO (0x60, 0x01) - FixedIO (0x64, 0x01) + IO (Decode16, 0x60, 0x60, 0x01, 0x01) + IO (Decode16, 0x64, 0x64, 0x01, 0x01) IRQNoFlags () {1} })
Name (_PRS, ResourceTemplate() { StartDependentFn (0, 0) { - FixedIO (0x60, 0x01) - FixedIO (0x64, 0x01) + IO (Decode16, 0x60, 0x60, 0x01, 0x01) + IO (Decode16, 0x64, 0x64, 0x01, 0x01) IRQNoFlags () {1} } EndDependentFn ()
-
Aaron Durbin