Timothy Pearson (tpearson@raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8261
-gerrit
commit aebd51c64d64413a82ddf59ef4179a7fdd173fed Author: Timothy Pearson tpearson@raptorengineeringinc.com Date: Fri Jan 23 20:20:56 2015 -0600
device/device.c: Correct PCI register space location
Fix the incorrect PCI register space location causing corruption with more than ~3.5GB physical RAM on AMD Family 10h systems.
Change-Id: I66d1bfa1e977a6b492c1909079087a801c7e6a3a Signed-off-by: Timothy Pearson tpearson@raptorengineeringinc.com --- src/northbridge/amd/amdfam10/northbridge.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c index 51cfee7..eaef7ba 100644 --- a/src/northbridge/amd/amdfam10/northbridge.c +++ b/src/northbridge/amd/amdfam10/northbridge.c @@ -677,6 +677,11 @@ static void amdfam10_domain_read_resources(device_t dev) res->size = CONFIG_MMCONF_BUS_NUMBER * 4096*256; res->flags = IORESOURCE_MEM | IORESOURCE_RESERVE | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; + + /* Reserve lower DRAM region to force PCI MMIO region to correct location above 0xefffffff */ + msr_t msr = rdmsr(TOP_MEM); + u64 tom = msr.lo; + ram_resource(dev, 7, 0, tom >> 10); #endif }