Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/71700 )
Change subject: soc/example: Remove dummy SOC_SPECIFIC_OPTIONS ......................................................................
soc/example: Remove dummy SOC_SPECIFIC_OPTIONS
Change-Id: I6f512d77218e9053968f85cd8f188499e711ecf1 Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M src/soc/example/min86/Kconfig 1 file changed, 14 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/71700/1
diff --git a/src/soc/example/min86/Kconfig b/src/soc/example/min86/Kconfig index d176752..12a13e5 100644 --- a/src/soc/example/min86/Kconfig +++ b/src/soc/example/min86/Kconfig @@ -1,5 +1,9 @@ config SOC_EXAMPLE_MIN86 bool + select ARCH_X86 + select NO_MONOTONIC_TIMER + select NO_ECAM_MMCONF_SUPPORT + select UNKNOWN_TSC_RATE help This example SoC code along with the example/min86 mainboard should serve as a minimal example how a buildable x86 SoC code @@ -12,13 +16,6 @@
if SOC_EXAMPLE_MIN86
-config SOC_SPECIFIC_OPTIONS - def_bool y - select ARCH_X86 - select NO_MONOTONIC_TIMER - select NO_ECAM_MMCONF_SUPPORT - select UNKNOWN_TSC_RATE - config DCACHE_BSP_STACK_SIZE # required by arch/x86/car.ld default 0x100