New patch to review for coreboot: a06021b baytrail: remove uses to MSR regscript opcodes

[Patrick Georgi]

Patrick Georgi ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6490

-gerrit

commit a06021b990a92b2ac7301e29b0e1d2f201e18b56
Author: Patrick Georgi 
Date:   Mon Aug 4 13:57:03 2014 +0200

baytrail: remove uses to MSR regscript opcodes

MSR related opcodes were used only in CPU configuration,
    so it's easy to get rid of them.

Change-Id: I57c3b537f02920f46974a5a77cce3e1115e0cd3e
    Signed-off-by: Patrick Georgi 
---
 src/soc/intel/baytrail/cpu.c | 35 +++++++++++------------------------
 1 file changed, 11 insertions(+), 24 deletions(-)

diff --git a/src/soc/intel/baytrail/cpu.c b/src/soc/intel/baytrail/cpu.c
index 15efab9..f2b816f 100644
--- a/src/soc/intel/baytrail/cpu.c
+++ b/src/soc/intel/baytrail/cpu.c
@@ -28,7 +28,6 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
-#include <reg_script.h>

#include <baytrail/msr.h>
 #include <baytrail/pattrs.h>
@@ -51,26 +50,6 @@ static int adjust_apic_id(int index, int apic_id)
    return 2 * index;
 }

-/* Package level MSRs */
-const struct reg_script package_msr_script[] = {
-	/* Set Package TDP to ~7W */
-	REG_MSR_WRITE(MSR_PKG_POWER_LIMIT, 0x3880fa),
-	REG_MSR_WRITE(MSR_PKG_TURBO_CFG1, 0x702),
-	REG_MSR_WRITE(MSR_CPU_TURBO_WKLD_CFG1, 0x200b),
-	REG_MSR_WRITE(MSR_CPU_TURBO_WKLD_CFG2, 0),
-	REG_SCRIPT_END
-};
-
-/* Core level MSRs */
-const struct reg_script core_msr_script[] = {
-	/* Dynamic L2 shrink enable and threshold */
-	REG_MSR_RMW(MSR_PMG_CST_CONFIG_CONTROL, ~0x3f000f, 0xe0008),
-	/* Disable C1E */
-	REG_MSR_RMW(MSR_POWER_CTL, ~0x2, 0),
-	REG_MSR_OR(MSR_POWER_MISC, 0x44),
-	REG_SCRIPT_END
-};
-
 void baytrail_init_cpus(device_t dev)
 {
    struct bus *cpu_bus = dev->link_list;
@@ -89,8 +68,11 @@ void baytrail_init_cpus(device_t dev)
    mp_params.num_records = ARRAY_SIZE(mp_steps);
    mp_params.microcode_pointer = pattrs->microcode_patch;

-	/* Set package MSRs */
-	reg_script_run(package_msr_script);
+	/* Set Package TDP to ~7W */
+	wrmsr(MSR_PKG_POWER_LIMIT, (msr_t){.lo = 0x3880fa});
+	wrmsr(MSR_PKG_TURBO_CFG1, (msr_t){.lo = 0x702});
+	wrmsr(MSR_CPU_TURBO_WKLD_CFG1, (msr_t){.lo = 0x200b});
+	wrmsr(MSR_CPU_TURBO_WKLD_CFG2, (msr_t){.lo = 0});

/* Enable Turbo Mode on BSP and siblings of the BSP's building block. */
    enable_turbo();
@@ -112,7 +94,12 @@ static void baytrail_core_init(device_t cpu)
    	enable_turbo();

/* Set core MSRs */
-	reg_script_run(core_msr_script);
+	/* Dynamic L2 shrink enable and threshold */
+	rmw_msr(MSR_PMG_CST_CONFIG_CONTROL, ~0x3f000f, 0xe0008);
+	/* Disable C1E */
+	rmw_msr(MSR_POWER_CTL, ~0x2, 0);
+	or_msr(MSR_POWER_MISC, 0x44);
+

/* Set this core to max frequency ratio */
    set_max_freq();