Change in coreboot[master]: (LGA775): Move ARCH_ALL_STAGES_X86_32 to socket_LGA775/Kconfig

[HAOUAS Elyes (Code Review)]

Attention is currently required from: Patrick Rudolph.
HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49506 )

Change subject: (LGA775): Move ARCH_ALL_STAGES_X86_32 to socket_LGA775/Kconfig
......................................................................

(LGA775): Move ARCH_ALL_STAGES_X86_32 to socket_LGA775/Kconfig

Also prepare for ARCH_EXP_X86_64 support.

Change-Id: Ib8643467c82d7db9f40e09aad852bbc60ef82192
Signed-off-by: Elyes HAOUAS 
---
M src/cpu/intel/model_1067x/Kconfig
M src/cpu/intel/model_6fx/Kconfig
M src/cpu/intel/model_f3x/Kconfig
M src/cpu/intel/model_f4x/Kconfig
M src/cpu/intel/socket_LGA775/Kconfig
5 files changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/49506/1

diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index 777eff6..9218dcd 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -1,6 +1,5 @@
 config CPU_INTEL_MODEL_1067X
    bool
-	select ARCH_ALL_STAGES_X86_32
    select SSE2
    select UDELAY_TSC
    select TSC_MONOTONIC_TIMER
diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig
index 1911ebc..be48ca1 100644
--- a/src/cpu/intel/model_6fx/Kconfig
+++ b/src/cpu/intel/model_6fx/Kconfig
@@ -1,6 +1,5 @@
 config CPU_INTEL_MODEL_6FX
    bool
-	select ARCH_ALL_STAGES_X86_32
    select SSE2
    select UDELAY_TSC
    select TSC_MONOTONIC_TIMER
diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig
index 61923b8..161707f 100644
--- a/src/cpu/intel/model_f3x/Kconfig
+++ b/src/cpu/intel/model_f3x/Kconfig
@@ -1,5 +1,4 @@
 config CPU_INTEL_MODEL_F3X
    bool
-	select ARCH_ALL_STAGES_X86_32
    select SUPPORT_CPU_UCODE_IN_CBFS
    select CPU_INTEL_COMMON
diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig
index d146dd4..b2f30cc 100644
--- a/src/cpu/intel/model_f4x/Kconfig
+++ b/src/cpu/intel/model_f4x/Kconfig
@@ -1,4 +1,3 @@
 config CPU_INTEL_MODEL_F4X
    bool
-	select ARCH_ALL_STAGES_X86_32
    select SUPPORT_CPU_UCODE_IN_CBFS
diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig
index c7d99a4..b9c64e4 100644
--- a/src/cpu/intel/socket_LGA775/Kconfig
+++ b/src/cpu/intel/socket_LGA775/Kconfig
@@ -3,6 +3,10 @@

if CPU_INTEL_SOCKET_LGA775

+config ARCH_EXP_X86_64
+	bool "Enable experimental 64bit support"
+	default n
+
 config SOCKET_SPECIFIC_OPTIONS # dummy
    def_bool y
    select CPU_INTEL_MODEL_6FX
@@ -15,6 +19,8 @@
    select SSE
    select SIPI_VECTOR_IN_ROM
    select NO_CBFS_MCACHE
+	select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64
+	select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64

config DCACHE_RAM_SIZE
    hex