Attention is currently required from: Eric Lai, Erik van den Bogaert, Frans Hendriks, Jonathon Hall, Michał Żygowski, Nico Huber, Piotr Król.
Felix Singer has posted comments on this change by Felix Singer. ( https://review.coreboot.org/c/coreboot/+/83373?usp=email )
Change subject: skl/kbl mainboards: Move PCIe related settings into their device scope
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Patch Set 2:
(2 comments)
File src/mainboard/51nb/x210/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/83373/comment/3c9a4641_c81e2b6b?usp... :
PS2, Line 42: # Enable Root Ports 3, 4 and 9
Remove that
File src/mainboard/intel/saddlebrook/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/83373/comment/18889d48_aa13263b?usp... :
PS2, Line 187: device ref pcie_rp1 on
interesting one... […]
Maybe the FSP switches it. Though, when we hook up PcieRpEnable to the devicetree on/off setting, then we need to enable pcie_rp7, otherwise port 7 will be disabled.
I'm moving it to pcie_rp7 later on the day. Thanks for pointing it out!
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