Change in coreboot[master]: soc/intel/cannonlake: add uart.c to verstage

[Nick Vaccaro (Code Review)]

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/21410

Change subject: soc/intel/cannonlake: add uart.c to verstage
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soc/intel/cannonlake: add uart.c to verstage

Adds uart.c to verstage.

Change-Id: I2d420ff7437d25a596ee9a120964f8d4bc413bc4
Signed-off-by: Nick Vaccaro 
---
M src/soc/intel/cannonlake/Makefile.inc
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/21410/1

diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index dba04a8..5b7fe88 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -46,6 +46,7 @@

verstage-y += gspi.c
 verstage-y += spi.c
+verstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c

CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include/fsp20
 CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp2_0/cannonlake