[XS] Change in coreboot[main]: soc/intel/common: Extend WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS to 1500ms

[Tony Huang (Code Review)]

Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83206?usp=email )

Change subject: soc/intel/common: Extend WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS to 1500ms
......................................................................

soc/intel/common: Extend WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS to 1500ms

Some dongles require more time to be ready,
this CL extedns the DP mode entry timeout from 0.5s to 1.5s and make
sure the tested dongle display works.

Before
[WARN ]  DP not ready after 500ms. Abort.

After
[INFO ]  DP ready after 1211 ms

BUG:b348309582
TEST:emerge coreboot
     verify tested dongles and monitors display works

Change-Id: I22d7800b50f6f7de9f147ae6998a5015d0dc0be9
Signed-off-by: Tony Huang 
---
M src/soc/intel/common/block/tcss/tcss.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/83206/1

diff --git a/src/soc/intel/common/block/tcss/tcss.c b/src/soc/intel/common/block/tcss/tcss.c
index 1c4b9b3..5ebc129 100644
--- a/src/soc/intel/common/block/tcss/tcss.c
+++ b/src/soc/intel/common/block/tcss/tcss.c
@@ -21,7 +21,7 @@
 #define BIAS_CTRL_VW_INDEX_SHIFT		16
 #define BIAS_CTRL_BIT_POS_SHIFT			8
 #define WAIT_FOR_DISPLAYPORT_TIMEOUT_MS		1000
-#define WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS	500
+#define WAIT_FOR_DP_MODE_ENTRY_TIMEOUT_MS	1500
 #define WAIT_FOR_HPD_TIMEOUT_MS			3000

static uint32_t tcss_make_conn_cmd(int u, int u3, int u2, int ufp, int hsl,