[S] Change in coreboot[main]: intel/common/block: Program the right power_limits_config entry

[Jérémy Compostella (Code Review)]

Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/85244?usp=email

to look at the new patch set (#12).

The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)

Change subject: intel/common/block: Program the right power_limits_config entry
......................................................................

intel/common/block: Program the right power_limits_config entry

When variant_update_cpu_power_limits() programs PL4, it systematically
sets the first entry of the power_limits_config SoC chip data
structure. This approach is problematic because the current SoC SKU
may align with a different data structure entry, introducing
inconsistencies.

This commit introduces the power_limits_index field to the
cpu_tdp_power_limits data structure. This field specifies the specific
power limits entry that should be updated.

All data structures utilized by this function are updated accordingly.

BUG=b:380408956
TEST=Able to retrieve collect 28W power_limit.

Change-Id: I32de8a24a2b5aee3eb5a6eee2d1d91e203085e65
Signed-off-by: Subrata Banik 
Signed-off-by: Jeremy Compostella 
---
M src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c
M src/mainboard/google/rex/variants/baseboard/rex/ramstage.c
M src/mainboard/google/rex/variants/deku/ramstage.c
M src/mainboard/google/rex/variants/screebo/variant.c
M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/ramstage.c
M src/soc/intel/common/block/include/intelblocks/power_limit.h
M src/soc/intel/common/block/power_limit/power_limit.c
7 files changed, 14 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/85244/12