[M] Change in coreboot[main]: Documentation: Add Topton N100 (X2F)

[Alicja Michalska (Code Review)]

Alicja Michalska has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85680?usp=email )

Change subject: Documentation: Add Topton N100 (X2F)
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Documentation: Add Topton N100 (X2F)

Document the board and how to flash coreboot.

Change-Id: Id585b064054b338ea8cead6edb6c5153030b9cde
Signed-off-by: Alicja Michalska 
---
M Documentation/mainboard/index.md
A Documentation/mainboard/topton/adl/x2f-n100.jpg
A Documentation/mainboard/topton/adl/x2f-n100.md
3 files changed, 90 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/85680/1

diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
index cb28fa9..80e17ef 100644
--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
@@ -406,6 +406,13 @@
 Beaglebone Black <ti/beaglebone-black.md>
 ```

+## Topton
+```{toctree}
+:maxdepth: 1
+
+X2F-N100 <topton/adl/x2f-n100.md>
+```
+
 ## UP

```{toctree}
diff --git a/Documentation/mainboard/topton/adl/x2f-n100.jpg b/Documentation/mainboard/topton/adl/x2f-n100.jpg
new file mode 100644
index 0000000..8ea7c1d
--- /dev/null
+++ b/Documentation/mainboard/topton/adl/x2f-n100.jpg
Binary files differ
diff --git a/Documentation/mainboard/topton/adl/x2f-n100.md b/Documentation/mainboard/topton/adl/x2f-n100.md
new file mode 100644
index 0000000..d47b469
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+++ b/Documentation/mainboard/topton/adl/x2f-n100.md
@@ -0,0 +1,83 @@
+# Topton N100 (X2F) Firewall Appliance
+
+This page describes how to run coreboot on the Topton X2F-N100.
+
+![](x2f-n100.jpg)
+
+```{eval-rst}
++-----------------+---------------------------------+----------------------+
+| Binary file     | Apply                           | Required / Optional  |
++=================+=================================+======================+
+| FSP-M & FSP-S   | Intel Firmware Support Package  | Required             |
++-----------------+---------------------------------+----------------------+
+| me.bin          | Intel Management Engine         | Required (see notes) |
++-----------------+---------------------------------+----------------------+
+| descriptor.bin  | Intel Flash Descriptor          | Required (see notes) |
++-----------------+---------------------------------+----------------------+
+```
+
+## Flashing coreboot
+
+WARNING: There are multiple devices from the same vendor with similar name, using different board layout, capabilities and EC/SuperIO.
+Please refer to reference picture above to ensure that device you own is the same as supported by coreboot.
+DO NOT attempt to flash this port on a different, "same-looking" device. Doing so *may* kill your device.
+You have been warned :)
+
+### Internally
+Vendor of this motherboard hasn't locked any flash regions, resulting in [flashprog] having full access to the SPI chip.
+Assuming that user had booted Linux with `iomem=relaxed`, they can:
+- Flash coreboot from stock firmware
+- Flash stock firmware from coreboot
+- Update coreboot build to a newer version
+Without opening the case and connecting the SPI flasher.
+
+Please note that for AlderLake-N platform you will need to use [flashprog] v1.3.0 or newer.
+[flashrom] is broken due to regressions, resulting in failed flashes and bricking the device.
+[flashprog] is a better maintained fork of [flashrom], so it may change in the future.
+For the time being, please use [flashprog] instead.
+
+You can skip extracting `SI_BIOS` and `SI_ME` regions from your ROM, and flash coreboot to `SI_BIOS` region by issuing the following command:
+`flashprog -p internal --ifd -i SI_BIOS -w ./build/coreboot.rom`
+
+### Externally
+SPI chip on this motherboard is located near the SoC, on the other side of the board (upper-right corner).
+Please note that SPI voltage on this board is standard 3.3V, despite using mobile SoC and PCH.
+Vendor populated this board with Winbond W25Q128JV chip in SOIC-8 package.
+
+## Functionality
+
+### Tested and working
+- "Cisco-style" serial console in the front of the device (RS232 in COM form-factor).
+- PC Speaker (goes beep-boop), controlled by ITE IT8625D.
+- All USB ports
+- All display ports
+- All NIC ports (4x Intel I226-V 2.5GbE)
+- M.2 NVME (PCIe x2 electrically)
+- SATA port (there's only one, no SATA connectivity on M.2 slot)
+- mPCIe WiFi/modem (needs an adapter from mPCIe to M.2 for modern wireless cards)
+- mPCIe (USB) 4G modem
+- PCIe passtrough (NICs to VMs, such as pfSense or OpenWrt using libvirt)
+- Intel PTT (fTPM 2.0)
+
+- Payload: EDK2, LinuxBoot
+- OS: Alpine Linux, Windows 11
+
+### Untested or broken
+- 5G modem on special M.2-like connector (lack hardware for it)
+- Suspend in Windows 11 (might work, but Windows has been tested from USB drive).
+
+## Specification
+```{eval-rst}
++-------+------------------------------+
+| SoC   | Intel AlderLake N (IoT)      |
++-------+------------------------------+
+| EC    | ITE IT8625D                  |
++-------+------------------------------+
+| SPI   | Winbond W25Q128 (16MiB 3.3V) |
++-------+------------------------------+
+| NIC   | 4x Intel I226-V (2.5GbE)     |
++-------+------------------------------+
+```
+
+[flashprog]: https://flashprog.org/wiki/Flashprog
+[flashrom]: https://flashrom.org/Flashrom