Change in ...coreboot[master]: soc/intel/cannonlake: Clear PMCON status bits

[Krishna P Bhat D (Code Review)]

Hello Patrick Rudolph, Subrata Banik, Balaji Manigandan, Aamir Bohra, Rizwan Qureshi, build bot (Jenkins), Lijian Zhao, Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31902

to look at the new patch set (#6).

Change subject: soc/intel/cannonlake: Clear PMCON status bits
......................................................................

soc/intel/cannonlake: Clear PMCON status bits

The prev_sleep_state value was showing 5 even after warm reboot, once the
SUS_PWR_FLR bit is being set. This bit was not being cleared.
Hence clearing the PMCON status bits.

BUG=b:128482282
BRANCH=None
TEST=In cbmem logs, check for value of “prev_sleep_state” using command
cbmem –c | grep “prev_sleep_state”

For cold reboot, "prev_sleep_state 5"
For warm reboot, "prev_sleep_state 0"

Change-Id: If9863d52ed3c61b6a160df53f023b0787eaaed68
Signed-off-by: Krishna Prasad Bhat 
---
M src/soc/intel/cannonlake/finalize.c
M src/soc/intel/cannonlake/include/soc/pm.h
M src/soc/intel/cannonlake/pmutil.c
3 files changed, 19 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/31902/6