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Ravishankar Sarawadi has posted comments on this change by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/83772?usp=email )
Change subject: soc/intel/ptl: Add SoC ACPI directory for Panther Lake
......................................................................
Patch Set 29:
(4 comments)
File src/soc/intel/pantherlake/acpi/serialio.asl:
https://review.coreboot.org/c/coreboot/+/83772/comment/0a627add_af29ec73?usp... :
PS23, Line 47: Device (I3C0)
: {
: Name (_ADR, 0x00110000)
: Name (_DDN, "Serial IO I3C Controller 0")
: }
:
: Device (I3C1)
: {
: Name (_ADR, 0x00110002)
: Name (_DDN, "Serial IO I3C Controller 1")
: }
Removing for now, would add if use case arises in future.
Done
File src/soc/intel/pantherlake/acpi/southbridge.asl:
https://review.coreboot.org/c/coreboot/+/83772/comment/13b3a0a0_fff8a1b8?usp... :
PS23, Line 47: /* UFS 0:17:0 */
: #include "ufs.asl"
UFS, IMO, we can add as feature enable later, removing for now.
Acknowledged
File src/soc/intel/pantherlake/acpi/tcss.asl:
https://review.coreboot.org/c/coreboot/+/83772/comment/3d98ab8a_641d51e5?usp... :
PS23, Line 727: If (TRE0 == 1) {
Fixed.
Acknowledged
File src/soc/intel/pantherlake/acpi/tcss_pcierp.asl:
https://review.coreboot.org/c/coreboot/+/83772/comment/15069410_059d6751?usp... :
PS23, Line 56: 0xBAC
I could, I will try adding macros to a few more in next patch.
Acknowledged
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