Selma Bensaid has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58233 )
Change subject: soc/intel/alderlake: fix NULL pointer derefrence ......................................................................
soc/intel/alderlake: fix NULL pointer derefrence
microcode_file could be NULL and passed to get_microcode_size, this was detcted by klocwork scan.
Signed-off-by: Selma Bensaid selma.bensaid@intel.com Change-Id: Ibb3d49ab18d8c26bbf5d6bf6bdf1bf91137f5736 --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 7 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/58233/1
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 333957f..f9569f9 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -346,12 +346,14 @@
/* Locate microcode and pass to FSP-S for 2nd microcode loading */ microcode_file = intel_microcode_find(); - microcode_len = get_microcode_size(microcode_file);
- if ((microcode_file != NULL) && (microcode_len != 0)) { - /* Update CPU Microcode patch base address/size */ - s_cfg->MicrocodeRegionBase = (uint32_t)(uintptr_t)microcode_file; - s_cfg->MicrocodeRegionSize = (uint32_t)microcode_len; + if (microcode_file != NULL) { + microcode_len = get_microcode_size(microcode_file); + if (microcode_len != 0) { + /* Update CPU Microcode patch base address/size */ + s_cfg->MicrocodeRegionBase = (uint32_t)(uintptr_t)microcode_file; + s_cfg->MicrocodeRegionSize = (uint32_t)microcode_len; + } }
/* Use coreboot MP PPI services if Kconfig is enabled */