Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47712 )
Change subject: cpu/x86/mp_init: Move BSP microcode update to MPINIT ......................................................................
cpu/x86/mp_init: Move BSP microcode update to MPINIT
Unify when microcode loading is done on Intel platforms. Update the microcode of the BSP on Intel CPUs as part of the MP init code. On most CPUs this does nothing as microcodes have been loaded earlier already.
Change-Id: Id626a48b68523b7f9488c004ac4cb88342671b65 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/cpu/x86/mp_init.c M src/soc/intel/apollolake/cpu.c M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/xeon_sp/cpx/cpu.c 4 files changed, 11 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/47712/1
diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index eddff53..b8d2008 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -521,11 +521,20 @@ return ret; }
-static void init_bsp(struct bus *cpu_bus) +static void init_bsp(struct bus *cpu_bus, struct mp_params *p) { struct device_path cpu_path; struct cpu_info *info;
+ /* + * Make sure BSP is using the microcode from cbfs. + * + * On recent Intel platform this is does nothing as the microcode + * is loaded using FIT or in previous stages. + */ + if (cpu_is_intel()) + intel_microcode_load_unlocked(p->microcode_pointer); + /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); @@ -573,7 +582,7 @@ int num_cpus; atomic_t *ap_count;
- init_bsp(cpu_bus); + init_bsp(cpu_bus, p);
if (p == NULL || p->flight_plan == NULL || p->num_records < 1) { printk(BIOS_CRIT, "Invalid MP parameters\n"); diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c index 0ae170b..b6a83d7 100644 --- a/src/soc/intel/apollolake/cpu.c +++ b/src/soc/intel/apollolake/cpu.c @@ -176,9 +176,6 @@ { *microcode = intel_microcode_find(); *parallel = 1; - - /* Make sure BSP is using the microcode from cbfs */ - intel_microcode_load_unlocked(*microcode); } #endif
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index c3fe40b..cf9756d 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -151,7 +151,6 @@ return;
microcode_patch = intel_microcode_find(); - intel_microcode_load_unlocked(microcode_patch);
init_cpus(); } diff --git a/src/soc/intel/xeon_sp/cpx/cpu.c b/src/soc/intel/xeon_sp/cpx/cpu.c index d1bcbd7..b87a98a 100644 --- a/src/soc/intel/xeon_sp/cpx/cpu.c +++ b/src/soc/intel/xeon_sp/cpx/cpu.c @@ -193,8 +193,6 @@ if (!microcode_patch) printk(BIOS_ERR, "microcode not found in CBFS!\n");
- intel_microcode_load_unlocked(microcode_patch); - if (mp_init_with_smm(dev->link_list, &mp_ops) < 0) printk(BIOS_ERR, "MP initialization failure.\n");
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47712 )
Change subject: cpu/x86/mp_init: Move BSP microcode update to MPINIT ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/47712/1/src/soc/intel/xeon_sp/cpx/c... File src/soc/intel/xeon_sp/cpx/cpu.c:
https://review.coreboot.org/c/coreboot/+/47712/1/src/soc/intel/xeon_sp/cpx/c... PS1, Line 191: microcode_patch = intel_microcode_find(); : : if (!microcode_patch) : printk(BIOS_ERR, "microcode not found in CBFS!\n"); unused now?
Patrick Rudolph has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/47712 )
Change subject: cpu/x86/mp_init: Move BSP microcode update to MPINIT ......................................................................
Abandoned
patch series replaced by CB:49303
-
Arthur Heymans (Code Review) -
Patrick Rudolph (Code Review)