[S] Change in coreboot[master]: soc/intel/meteorlake: Enable tbtPcie2/3

[Ivy Jian (Code Review)]

Attention is currently required from: Tarun Tuli, Kapil Porwal, Ivy Jian.

Hello build bot (Jenkins), Tarun Tuli, Subrata Banik, Kapil Porwal, Eric Lai,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/67530

to look at the new patch set (#3).

Change subject: soc/intel/meteorlake: Enable tbtPcie2/3
......................................................................

soc/intel/meteorlake: Enable tbtPcie2/3

Adding support enables/disables tbtPcie2/3 by usb4_params.

BUG=b:244687646
TEST= TRP2/3 are enabled as expected.
before patch
[INFO ]  PCI: Static device PCI: 00:07.2 not found, disabling it.
[INFO ]  PCI: Static device PCI: 00:07.3 not found, disabling it.
after patch
[DEBUG]  PCI: 00:07.2 subordinate bus PCI Express
[DEBUG]  PCI: 00:07.2 [8086/7ec6] enabled
[DEBUG]  PCI: 00:07.3 subordinate bus PCI Express
[DEBUG]  PCI: 00:07.3 [8086/7ec7] enabled

Signed-off-by: Ivy Jian 
Change-Id: Ia1bdc9b5c0533bdddae67b8039103162a57fdc39
---
M src/soc/intel/meteorlake/romstage/fsp_params.c
1 file changed, 25 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/67530/3