Change in coreboot[master]: mb/google/nissa:[TESTONLY] Devicetree WA for debug

[V Sowmya (Code Review)]

Attention is currently required from: Tim Wawrzynczak.
V Sowmya has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63816 )

Change subject: mb/google/nissa:[TESTONLY] Devicetree WA for debug
......................................................................

mb/google/nissa:[TESTONLY] Devicetree WA for debug

Signed-off-by: V Sowmya 
Change-Id: Id81d9aadbb353746700ddd07da924a59527600c7
---
M src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
M src/mainboard/google/brya/variants/nivviks/overridetree.cb
2 files changed, 4 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/63816/1

diff --git a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
index dfc0a85..2d968a2c 100644
--- a/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb
@@ -117,10 +117,10 @@
    device domain 0 on
    	device ref igpu on end
    	device ref dtt on end
-		device ref tcss_xhci on end
+		device ref tcss_xhci off end
    	device ref xhci on end
    	device ref shared_sram on end
-		device ref cnvi_wifi on
+		device ref cnvi_wifi off
    		chip drivers/wifi/generic
    			register "wake" = "GPE0_PME_B0"
    			device generic 0 on end
diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
index 1bb1289..bc4d555 100644
--- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb
+++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb
@@ -273,9 +273,9 @@
    			end
    		end
    	end
-		device ref tcss_xhci on
+		device ref tcss_xhci off
    		chip drivers/usb/acpi
-				device ref tcss_root_hub on
+				device ref tcss_root_hub off
    				chip drivers/usb/acpi
    					register "desc" = ""USB3 Type-C Port C0 (MLB)""
    					register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"