Ravishankar Sarawadi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37426 )
Change subject: soc/intel/tigerlake: Update Kconfig ......................................................................
Patch Set 9:
(7 comments)
https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kco... File src/soc/intel/tigerlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kco... PS8, Line 64: INTEL_CAR_NEM
Changes being made in this file should have appropriate information in commit message explaining the […]
Done
https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kco... PS8, Line 84: 0x30000
+1 to Furquan's comments.
Done
https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kco... PS8, Line 147: 7
As per JSL EDS only 3 SPI ports
Done
https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kco... PS8, Line 151: 8
As per JSL EDS only 6 I2C ports
Done
https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kco... PS8, Line 155: default 7
As per JSL EDS only 3 UART ports
Done
https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kco... PS8, Line 165: 0x25A
Please use lower case for hex characters to keep it consistent with other hex values in this file.
Done
https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kco... PS8, Line 169: 0x7FFF
Why did the values for M/N change?
The change is in accordance with tigerlake FSP, I will find supporting doc if any.